Virgil Dupras
029df00ad4
Free some space for xcomp core
2020-05-13 09:11:57 -04:00
Virgil Dupras
56af516d07
Move core's fmt to xcomp core (high)
2020-05-13 09:02:44 -04:00
Virgil Dupras
e2e9faef2c
Move a bunch of words from core to xcomp core
2020-05-13 08:50:07 -04:00
Virgil Dupras
d6a3e79394
Free some space for xcomp core low
2020-05-13 08:00:49 -04:00
Virgil Dupras
ddf23e3d02
Move a bunch of words from core to xcomp core
2020-05-13 07:55:36 -04:00
Virgil Dupras
cbf5baf3b6
Pack core words a bit
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This leaves space for xcomp-core which is growing.
2020-05-12 21:27:06 -04:00
Virgil Dupras
dfe474ca0e
xcomp: add XCOMPILE and X[COMPILE]
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This allows us to move words like ABORT" to xcomp-core, which is
I think the last roadblock before being able to unify all drivers
into a single xcomp layer.
2020-05-12 21:08:18 -04:00
Virgil Dupras
1094ec9c57
Make DO..LOOP stable
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DO and LOOP now only compile words from stable ABI, which make them
suitable for xcomp. This will greatly simplify driver writing and
allow us to mostly avoid the low/high divide in drivers.
LEAVE is still xcomp-incompatible though.
This make us very very tight for "<0x100" limit for literal words.
Hopefully, we won't need more stuff in that area of the binary...
2020-05-12 10:40:59 -04:00
Virgil Dupras
b760c2d353
SCPY: don't copy the NULL
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This makes [entry] much simpler. Also, remove unused LITS word.
2020-05-12 07:36:20 -04:00
Virgil Dupras
231d727598
Move a few words from core to xcomp core
2020-05-12 07:21:34 -04:00
Virgil Dupras
da371451cc
Replace INITIAL_SP with PS_ADDR conf
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Now I struggle to remember why I ever did things they way I did.
There must have been a reason...
2020-05-11 21:08:24 -04:00
Virgil Dupras
a476773813
Add words BIT@ and BIT!
2020-05-10 08:40:49 -04:00
Virgil Dupras
e06d6c5345
ti84: we have a prompt
2020-05-09 14:28:55 -04:00
Virgil Dupras
4ce0727c72
ti84: kbd driver wip
2020-05-09 11:55:58 -04:00
Virgil Dupras
afc2327770
Split icore in 2 parts
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The goal is to insert device drivers in between.
2020-05-08 21:47:03 -04:00
Virgil Dupras
baf725aa38
Move a bunch of words from core to inner core
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That makes it easier to write drivers that can be xcompiled.
2020-05-08 20:55:50 -04:00
Virgil Dupras
b90efb0f7f
ti84: first glyph on screen!
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On the emulator of course...
2020-05-08 09:07:44 -04:00
Virgil Dupras
58ec54fc97
ti84: wip
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Gave more priority to CPU in the emulator because initialization would
otherwise be horrendously slow.
2020-05-08 07:56:34 -04:00
Virgil Dupras
24e588019b
Add words RSHIFT and LSHIFT
2020-05-07 15:41:43 -04:00
Virgil Dupras
eaeb138a0c
Add words C@- C!- and MOVE-
2020-05-06 20:37:08 -04:00
Virgil Dupras
58ece9f9a1
editor: implement I command
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Also, made LIST properly handle full 64-chars lines not ending with
a null or CR. Previously, such a line would be accompanied by its
following line, duplicating that line's output.
2020-05-06 12:19:36 -04:00
Virgil Dupras
f54b1dc504
Add 2>R and 2R>
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This allows us to make DO..LOOP more compact.
2020-05-06 09:55:05 -04:00
Virgil Dupras
60b4bbf28a
Fix DUMP's broken "round up to next 8" logic
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This was caused by the removal of signed-ness a long while ago.
2020-05-05 22:09:11 -04:00
Virgil Dupras
31119c2de3
xcomp: move all offset spitting to the end of the unit
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I'd like to move this code, along with all recipe contents, to blk/.
It's easier if "emul-related" code is gathered at the same place.
2020-05-05 20:10:04 -04:00
Virgil Dupras
fa79e3d8a6
Make (print) stop on CR
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Lines edited with the Block editor end with 0xd and (print) spits
spurious CR when printing those lines.
Also, properly initialize ACC in BROWSE.
2020-05-05 15:49:50 -04:00
Virgil Dupras
c681cb639d
Add words >< and =><=
2020-05-04 22:30:29 -04:00
Virgil Dupras
c494917452
blk: Add LOAD+ and LOADR+
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And use them in all places they make sense.
2020-05-04 21:43:48 -04:00
Virgil Dupras
24e9fa0c30
Add word NL
2020-05-04 08:10:18 -04:00
Virgil Dupras
a3c3a2f44a
Remove unused DELW
2020-05-03 20:36:35 -04:00
Virgil Dupras
47a9c89f19
Update READMEs
2020-05-03 12:51:21 -04:00
Virgil Dupras
f023f9bcb4
Pack core words blks a bit tighter
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With all this recent movements, we had a bit of a fragmentation
issue.
2020-05-02 21:47:32 -04:00
Virgil Dupras
3d908cef3a
Move all parsing words to Inner core
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This allows us to get rid of the (parse*) indirection.
2020-05-02 21:21:47 -04:00
Virgil Dupras
8009270e79
Optimize parsing words
2020-05-02 20:32:20 -04:00
Virgil Dupras
931c812394
Remove cmp
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Not worth the complexity and space.
2020-05-02 19:57:56 -04:00
Virgil Dupras
0b3a328e65
Add a layer of indirection for KEY
2020-05-02 11:17:28 -04:00
Virgil Dupras
446a58006d
Remove one of the 2 indirection layers for EMIT
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2 was overkill
2020-05-02 10:26:34 -04:00
Virgil Dupras
3a27479f2b
fix stupid typo
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I don't believe this, one hour of my life I'll never get back.
2020-05-02 08:06:37 -04:00
Virgil Dupras
2a578b3352
editor: implement F
2020-05-01 21:52:38 -04:00
Virgil Dupras
ecca70c7f3
Add layer of indirection to EMIT
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This would allow things like temporary giving control to the *CL
line on the TRS-80. For example... A very far fetched example. Not
at all the only *raison d'etre* of the layer...
2020-05-01 20:05:15 -04:00
Virgil Dupras
5bf3baff05
editor: add edit buffer
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Also, add word "C!+" and fix PSP leak in FILL.
2020-05-01 13:17:40 -04:00
Virgil Dupras
f38de1c151
Introduce the notion of Extra words
2020-04-29 21:52:18 -04:00
Virgil Dupras
0cf26547ff
Add words FLUSH and COPY
2020-04-29 20:21:18 -04:00
Virgil Dupras
581f04a4bc
Keep stage1 bootstrap bin instead of stage 0
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XPACKed source needing to be kept in bootstrap bin didn't make
much sense. With the removal of stripfc, it makes more sense to keep
the compiled form of stage 1 in repository as a bootstrap binary.
Also, rename it to forth.bin.
2020-04-29 19:38:43 -04:00
Virgil Dupras
1b2c4b519e
icore: add BIN+
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This allows us to write LATEST at proper offset in emul/stage1.fs in
cases where we set a nonzero BIN(.
2020-04-29 11:42:09 -04:00
Virgil Dupras
61b2e02351
xcomp: remove XOFF and use ORG and BIN( instead
2020-04-28 09:37:00 -04:00
Virgil Dupras
4501313410
Add [IF] .. [THEN]
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Will be useful as kinds of "#ifdef"s during xcomp.
2020-04-28 08:28:59 -04:00
Virgil Dupras
2b2ccad96c
Add word FILL
2020-04-27 21:22:06 -04:00
Virgil Dupras
f605e2d85c
Give CASE's default branch access to its input value
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ref #97
2020-04-27 20:44:21 -04:00
Virgil Dupras
295b4b6e0a
z80a: add BIN( parameter
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Will be useful for assembling binaries for the TRS-80 which can't start
at addr 0.
2020-04-27 15:11:38 -04:00
Virgil Dupras
dee7eea497
Move link.fs to blkfs
2020-04-26 14:37:54 -04:00