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Replace INITIAL_SP with PS_ADDR conf
Now I struggle to remember why I ever did things they way I did. There must have been a reason...
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8
blk/076
8
blk/076
@ -1,6 +1,6 @@
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STACK OVERFLOW PROTECTION: To avoid having to check for stack
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underflow after each pop operation (which can end up being
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prohibitive in terms of costs), we give ourselves a nice 6
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bytes buffer. 6 bytes because we seldom have words requiring
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more than 3 items from the stack. Then, at each "exit" call we
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check for stack underflow.
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prohibitive in terms of costs), PS_ADDR should be set to
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at least 6 bytes before its actual limit. 6 bytes because we
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seldom have words requiring more than 3 items from the stack.
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Then, at each "exit" call we check for stack underflow.
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4
blk/081
4
blk/081
@ -1,5 +1,4 @@
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(cont.)
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RAMSTART INITIAL_SP +55 (key) override
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RAMSTART FUTURE USES +55 (key) override
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+02 CURRENT +57 readln's variables
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+04 HERE +59 blk's variables
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+06 C<? +5b z80a's variables
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@ -13,4 +12,5 @@ RAMSTART INITIAL_SP +55 (key) override
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+53 (emit) override
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(cont.)
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6
blk/082
6
blk/082
@ -1,6 +1,3 @@
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INITIAL_SP holds the initial Stack Pointer value so
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that we know where to reset it on ABORT
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CURRENT points to the last dict entry.
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HERE points to current write offset.
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@ -13,4 +10,7 @@ C<* holds routine address called on C<. If the C<* override
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at 0x08 is nonzero, this routine is called instead.
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(cont.)
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20
blk/280
20
blk/280
@ -1,16 +1,16 @@
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Z80 boot code
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This assembles the boot binary. It requires the Z80 assembler
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(B200) and cross compilation setup (B260).
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(B200) and cross compilation setup (B260). It also requires
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these constants to be set:
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On top of that, it requires RAMSTART to be defined as the
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beginning address of RAM. This is where system variables are
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placed. HERE is then placed at RAM+80 (ref B80).
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RAMSTART: beginning address of RAM. This is where system
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variables are placed. HERE is then placed at RAM+80 (ref B80).
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We also need RS_ADDR to be set to the bottom address of the
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Return Stack.
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RS_ADDR: to be set to the bottom address of the Return Stack.
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RESERVED REGISTERS: At all times, IX points to RSP TOS and IY
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is IP. SP points to PSP TOS, but you can still use the stack\
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in native code. you just have to make sure you've restored it
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before "next". (cont.)
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PS_ADDR: top address of the Parameter stack (PS grows down-
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wards). Allow space for stack underflow protection (B76).
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(cont.)
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15
blk/281
15
blk/281
@ -1,7 +1,12 @@
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(cont.) STABLE ABI: The boot binary starts with a list of
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references. The address of these references have to stay to
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those addresses. The rest of the Collapse OS code depend on it.
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In fact, up until 0x67, the (?br) wordref, pretty much
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everything has to stay put.
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RESERVED REGISTERS: At all times, IX points to RSP TOS and IY
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is IP. SP points to PSP TOS, but you can still use the stack\
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in native code. you just have to make sure you've restored it
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before "next".
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STABLE ABI: The boot binary starts with a list of references.
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The address of these references have to stay to those addr-
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esses. The rest of the Collapse OS code depend on it. In fact,
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up until 0x67, the (?br) wordref, pretty much everything has
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to stay put.
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To assemble, run "282 LOAD".
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3
blk/289
3
blk/289
@ -3,8 +3,7 @@ L1 BSET 'B' A, 'O' A, 'O' A, 'T' A, 0 A,
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PC ORG @ 1 + ! ( main )
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( STACK OVERFLOW PROTECTION: See B76 )
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SP 0xfffa LDddnn,
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RAMSTART SP LD(nn)dd, ( RAM+00 == INITIAL_SP )
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SP PS_ADDR LDddnn,
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IX RS_ADDR LDddnn,
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( HERE begins at RAMEND )
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HL RAMSTART 0x80 + LDddnn,
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10
blk/299
10
blk/299
@ -1,14 +1,10 @@
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PC ORG @ 0x1e + ! ( chkPS )
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HL PUSHqq,
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RAMSTART LDHL(nn), ( RAM+00 == INITIAL_SP )
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( We have the return address for this very call on the stack
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and protected registers. Let's compensate )
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HL DECss,
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HL DECss,
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HL DECss,
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HL DECss,
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and protected registers. 4 - is to compensate that. )
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HL PS_ADDR 4 - LDddnn,
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SP SUBHLss,
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HL POPqq,
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CNC RETcc, ( INITIAL_SP >= SP? good )
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CNC RETcc, ( PS_ADDR >= SP? good )
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JR, L2 BWR ( abortUnderflow-B298 )
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2
blk/310
2
blk/310
@ -9,7 +9,7 @@ CODE PICK
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B (HL) LDrr,
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( check PS range before returning )
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EXDEHL,
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RAMSTART LDHL(nn), ( RAM+00 == INITIAL_SP )
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HL PS_ADDR LDddnn,
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DE SUBHLss,
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CC L2 @ JPccnn, ( abortUnderflow-B298 )
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BC PUSHqq,
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2
blk/313
2
blk/313
@ -1,5 +1,5 @@
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CODE S0
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RAMSTART LDHL(nn), ( RAM+00 == INITIAL_SP )
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HL PS_ADDR LDddnn,
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HL PUSHqq,
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;CODE
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3
blk/327
3
blk/327
@ -3,8 +3,7 @@ CODE BYE
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;CODE
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CODE (resSP)
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( INITIAL_SP == RAM+0 )
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SP RAMSTART LDdd(nn),
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SP PS_ADDR LDddnn,
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;CODE
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CODE (resRS)
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BIN
emul/forth.bin
BIN
emul/forth.bin
Binary file not shown.
@ -1,5 +1,6 @@
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0xe800 CONSTANT RAMSTART
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0xf000 CONSTANT RS_ADDR
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0xfffa CONSTANT PS_ADDR
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212 LOAD ( z80 assembler )
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262 LOAD ( xcomp )
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: CODE XCODE ;
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@ -1,5 +1,6 @@
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0x8000 CONSTANT RAMSTART
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0xf000 CONSTANT RS_ADDR
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0xfffa CONSTANT PS_ADDR
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0x80 CONSTANT ACIA_CTL
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0x81 CONSTANT ACIA_IO
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4 CONSTANT SDC_SPI
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@ -1,5 +1,6 @@
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0x8000 CONSTANT RAMSTART
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0xb000 CONSTANT RS_ADDR
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0xbffa CONSTANT PS_ADDR
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RAMSTART 0x70 + CONSTANT LCD_MEM
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RAMSTART 0x72 + CONSTANT KBD_MEM
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0x01 CONSTANT KBD_PORT
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@ -1,4 +1,5 @@
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0xf000 CONSTANT RS_ADDR
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0xfffa CONSTANT PS_ADDR
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RS_ADDR 0x80 - CONSTANT RAMSTART
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212 LOAD ( z80 assembler )
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262 LOAD ( xcomp )
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