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Working on programming AVR chips exposes a glaring omission in my first design of the SPI Relay: not allowing multiple devices make this task hard. I constantly have to unplug my SD card before, plug the AVR chip holder, then play a bit, then unplug the AVR holder, then replug the SD card... My prototype for a SPI relay design is built, but I haven't tested it yet. I need to adapt the code first, which is what I do here. When the prototype is tested, I'll update the SDC recipe with a new schema.
144 lines
5.5 KiB
Markdown
144 lines
5.5 KiB
Markdown
# Accessing a MicroSD card
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Warning: this recipe is temporarily broken. The schema below hasn't yet been
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updated to work with the new SPI relay protocol. If you've already built an
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old design, use an earlier commit or work around it in the SPI driver it should
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only be a matter of testing the input value for zero-ness to decide whether we
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ping the CSLOW or CSHIGH port. If you haven't, wait a little bit before building
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one: the upcoming design is better.
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SD cards are great because they are accessible directly. No supporting IC is
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necessary. The easiest way to access them is through the SPI protocol.
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Due to the way IO works in z80, implementing SPI through it as a bit awkward:
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You can't really keep pins high and low on an IO line. You need some kind of
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intermediary between z80 IOs and SPI.
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There are many ways to achieve this. This recipe explains how to build your own
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hacked off SPI relay for the RC2014. It can then be used with the SD Card
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subsystem (B420) to drive a SD card.
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## Gathering parts
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* A RC2014 Classic
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* A MicroSD breakout board. I use Adafruit's.
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* A proto board + header pins with 39 positions so we can make a RC2014 card.
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* Diodes, resistors and stuff
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* 40106 (Inverter gates)
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* 4011 (NAND gates)
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* 74xx139 (Decoder)
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* 74xx161 (Binary counter)
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* 74xx165 (Parallel input shift register)
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* 74xx595 (Shift register)
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## Building the SPI relay
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The [schematic][schematic] supplied with this recipe works well with the SD
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Card subsystem (B420). Of course, it's not the only possible design that
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works, but I think it's one of the most straighforwards.
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The basic idea with this relay is to have one shift register used as input,
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loaded in parallel mode from the z80 bus and a shift register that takes the
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serial input from `MISO` and has its output wired to the z80 bus.
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These two shift registers are clocked by a binary counter that clocks exactly
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8 times whenever a write operation on port `4` occurs. Those 8 clocks send
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data we've just received in the `74xx165` into `MOSI` and get `MISO` into the
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`74xx595`.
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The `74xx139` then takes care of activating the right ICs on the right
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combinations of `IORQ/WR/RD/Axx`.
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The rest of the ICs is fluff around this all.
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My first idea was to implement the relay with an AVR microcontroller to
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minimize the number of ICs, but it's too slow. We have to be able to respond
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within 300ns! Following that, it became necessary to add a 595 and a 165, but
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if we're going to add that, why not go the extra mile and get rid of the
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microcontroller?
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To that end, I was heavily inspired by [this design][inspiration].
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This board uses port `4` for SPI data, port `5` to pull `CS` low and port `6`
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to pull it high. Port `7` is unused but monopolized by the card.
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Advice 1: If you make your own design, double check propagation delays!
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Some NAND gates, such as the 4093, are too slow to properly respond within
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a 300ns limit. For example, in my own prototype, I use a 4093 because that's
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what I have in inventory. For the `CS` flip-flop, the propagation delay doesn't
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matter. However, it *does* matter for the `SELECT` line, so I don't follow my
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own schematic with regards to the `M1` and `A2` lines and use two inverters
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instead.
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Advice 2: Make `SCK` polarity configurable at all 3 endpoints (the 595, the 165
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and SPI connector). Those jumpers will be useful when you need to mess with
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polarity in your many tinkering sessions to come.
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Advice 3: Make input `CLK` override-able. SD cards are plenty fast enough for us
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to use the system clock, but you might want to interact with devices that
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require a slower clock.
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## Building your binary
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The binary built in the base recipe doesn't have SDC drivers. You'll need to
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assemble a binary with those drivers. To do so, you'll modify the xcomp unit
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of the base recipe. Look at `xcomp.fs`, you'll see that we load a block. That's
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our xcomp block (likely, B599). Open it.
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First, we need drivers for the SPI relay. This is done by declaring `SPI_DATA`,
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`SPI_CSLOW` and `SPI_CSHIGH`, which are respectively `4`, `5` and `6` in our
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relay design. We also need to define SPI_DELAY, which we keep to 2 NOPs because
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we use the system clock:
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: SPI_DELAY NOP, NOP, ;
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You can then load the driver with `596 LOAD`. This driver provides
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`(spix)`, `(spie)` and `(spid)` which are then used in the SDC driver.
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The SDC driver is at B420. It gives you a load range. This means that what
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you need to insert in `xcomp` will look like:
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423 436 LOADR ( sdc )
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You also need to add `BLK$` to the init sequence.
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Build it (run `make pack` in `cvm/` first to ensure an up-to-date blkfs) and
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write it to EEPROM.
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## Testing in the emulator
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The RC2014 emulator includes SDC emulation. You can attach a SD card image to
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it by invoking it with a second argument:
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../../../emul/hw/rc2014/classic os.bin ../../../cvm/blkfs
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You will then run with a SD card having the contents from `/blk`.
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## Usage
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First, the SD card needs to be initialized
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SDC$
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If there is no error message, we're fine. Then, we need to hook `BLK@*` and
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`BLK!*` into the SDC driver:
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' SDC@ BLK@* !
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' SDC! BLK!* !
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And thats it! You have full access to disk block mechanism:
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105 LOAD
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BROWSE
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(at this moment, the driver is a bit slow though...)
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## How do I fill my SD card with Collapse OS' FS?
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Very easy. You see that `/cvm/blkfs` file? You dump it to your raw device.
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For example, if the device you get when you insert your SD card is `/dev/sdb`,
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then you type `cat emul/blkfs | sudo tee /dev/sdb > /dev/null`.
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[schematic]: spirelay.pdf
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[inspiration]: https://www.ecstaticlyrics.com/electronics/SPI/fast_z80_interface.html
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