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110 lines
3.9 KiB
Markdown
110 lines
3.9 KiB
Markdown
# Accessing a MicroSD card
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SD cards are great because they are accessible directly. No supporting IC is
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necessary. The easiest way to access them is through the SPI protocol.
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Due to the way IO works in z80, implementing SPI through it as a bit awkward:
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You can't really keep pins high and low on an IO line. You need some kind of
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intermediary between z80 IOs and SPI.
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There are many ways to achieve this. This recipe explains how to build your own
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hacked off SPI relay for the RC2014. It can then be used with `sdc.fs` to
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drive a SD card.
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## Goal
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Read and write to a SD card from Collapse OS using a SPI relay of our own
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design.
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## Gathering parts
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* A RC2014 Classic
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* `stage3.bin` from the base recipe
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* A MicroSD breakout board. I use Adafruit's.
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* A proto board + header pins with 39 positions so we can make a RC2014 card.
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* Diodes, resistors and stuff
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* 40106 (Inverter gates)
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* 4011 (NAND gates)
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* 74xx139 (Decoder)
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* 74xx161 (Binary counter)
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* 74xx165 (Parallel input shift register)
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* 74xx595 (Shift register)
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## Building the SPI relay
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The [schematic][schematic] supplied with this recipe works well with `sdc.fs`.
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Of course, it's not the only possible design that works, but I think it's one
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of the most straighforwards.
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The basic idea with this relay is to have one shift register used as input,
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loaded in parallel mode from the z80 bus and a shift register that takes the
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serial input from `MISO` and has its output wired to the z80 bus.
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These two shift registers are clocked by a binary counter that clocks exactly
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8 times whenever a write operation on port `4` occurs. Those 8 clocks send
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data we've just received in the `74xx165` into `MOSI` and get `MISO` into the
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`74xx595`.
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The `74xx139` then takes care of activating the right ICs on the right
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combinations of `IORQ/WR/RD/Axx`.
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The rest of the ICs is fluff around this all.
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My first idea was to implement the relay with an AVR microcontroller to
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minimize the number of ICs, but it's too slow. We have to be able to respond
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within 300ns! Following that, it became necessary to add a 595 and a 165, but
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if we're going to add that, why not go the extra mile and get rid of the
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microcontroller?
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To that end, I was heavily inspired by [this design][inspiration].
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This board uses port `4` for SPI data, port `5` to pull `CS` low and port `6`
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to pull it high. Port `7` is unused but monopolized by the card.
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Little advice: If you make your own design, double check propagation delays!
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Some NAND gates, such as the 4093, are too slow to properly respond within
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a 300ns limit. For example, in my own prototype, I use a 4093 because that's
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what I have in inventory. For the `CS` flip-flop, the propagation delay doesn't
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matter. However, it *does* matter for the `SELECT` line, so I don't follow my
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own schematic with regards to the `M1` and `A2` lines and use two inverters
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instead.
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## Building your stage 4
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Using the same technique as you used for building your stage 3, you can append
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required words to your boot binary. Required units are `forth/blk.fs` and
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`drv/sdc.fs`. You also need `drv/sdc.z80` but to save you the troubles of
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rebuilding from stage 1 for this recipe, we took the liberty of already having
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included it in the base recipe.
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## Testing in the emulator
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The RC2014 emulator includes SDC emulation. You can attach a SD card image to
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it by invoking it with a second argument:
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../../../emul/hw/rc2014/classic stage4.bin ../../../emul/blkfs
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You will then run with a SD card having the contents from `/blk`.
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## Usage
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First, the SD card needs to be initialized
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SDC$
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If there is no error message, we're fine. Then, we need to hook `BLK@*` and
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`BLK!*` into the SDC driver:
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' SDC@ BLK@* !
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' SDC! BLK!* !
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And thats it! You have full access to disk block mechanism:
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102 LOAD
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BROWSE
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(at this moment, the driver is a bit slow though...)
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[schematic]: spirelay/spirelay.pdf
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[inspiration]: https://www.ecstaticlyrics.com/electronics/SPI/fast_z80_interface.html
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