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6 Commits
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...
19d94dfb47
Author | SHA1 | Date | |
---|---|---|---|
|
19d94dfb47 | ||
|
287213fc68 | ||
|
82044454d5 | ||
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9c41744e46 | ||
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7544b3834b | ||
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ae470397d7 |
@ -29,7 +29,7 @@ ACIA_MEM: Address in memory that can be used variables shared
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||||
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: ACIA$
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H@ DUP DUP ACIA( ! ACIAR> !
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1+ ACIAW> ! ( write index starts one position later )
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1+ ACIAW> ! ( write index starts one position later )
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ACIABUFSZ ALLOT
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H@ ACIA) !
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( setup ACIA
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@ -42,7 +42,7 @@ ACIA_MEM: Address in memory that can be used variables shared
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( setup interrupt )
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( 4e == INTJUMP )
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0xc3 0x4e RAM+ C! ( JP upcode )
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0xc3 0x4e RAM+ C! ( JP upcode )
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['] ~ACIA 0x4f RAM+ !
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(im1)
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;
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|
@ -1,5 +1,5 @@
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EXTOBJS = ../../emul.o ../../libz80/libz80.o
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OBJS = acia.o classic.o
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OBJS = acia.o sdc.o classic.o
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TARGET = classic
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.PHONY: all
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|
@ -13,13 +13,18 @@
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#include <termios.h>
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#include "../../emul.h"
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#include "acia.h"
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#include "sdc.h"
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#define RAMSTART 0x8000
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#define ACIA_CTL_PORT 0x80
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#define ACIA_DATA_PORT 0x81
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#define SDC_CSHIGH 0x06
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#define SDC_CSLOW 0x05
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#define SDC_SPI 0x04
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#define MAX_ROMSIZE 0x2000
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static ACIA acia;
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static SDC sdc;
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static uint8_t iord_acia_ctl()
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{
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@ -41,10 +46,30 @@ static void iowr_acia_data(uint8_t val)
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acia_data_wr(&acia, val);
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}
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static uint8_t iord_sdc_spi()
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{
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return sdc_spi_rd(&sdc);
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}
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static void iowr_sdc_spi(uint8_t val)
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{
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sdc_spi_wr(&sdc, val);
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}
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static void iowr_sdc_cshigh(uint8_t val)
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{
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sdc_cshigh(&sdc);
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}
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static void iowr_sdc_cslow(uint8_t val)
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{
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sdc_cslow(&sdc);
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}
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int main(int argc, char *argv[])
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{
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if (argc != 2) {
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fprintf(stderr, "Usage: ./classic /path/to/rom\n");
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if (argc < 2) {
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fprintf(stderr, "Usage: ./classic /path/to/rom [sdcard.img]\n");
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return 1;
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}
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FILE *fp = fopen(argv[1], "r");
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@ -81,10 +106,19 @@ int main(int argc, char *argv[])
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}
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acia_init(&acia);
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sdc_init(&sdc);
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if (argc == 3) {
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fprintf(stderr, "Setting up SD card image\n");
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sdc.fp = fopen(argv[2], "r+");
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}
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m->iord[ACIA_CTL_PORT] = iord_acia_ctl;
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m->iord[ACIA_DATA_PORT] = iord_acia_data;
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m->iowr[ACIA_CTL_PORT] = iowr_acia_ctl;
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m->iowr[ACIA_DATA_PORT] = iowr_acia_data;
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m->iord[SDC_SPI] = iord_sdc_spi;
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m->iowr[SDC_SPI] = iowr_sdc_spi;
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m->iowr[SDC_CSHIGH] = iowr_sdc_cshigh;
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m->iowr[SDC_CSLOW] = iowr_sdc_cslow;
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char tosend = 0;
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while (emul_step()) {
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@ -126,5 +160,8 @@ int main(int argc, char *argv[])
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tcsetattr(0, TCSADRAIN, &saved_term);
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emul_printdebug();
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}
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if (sdc.fp) {
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fclose(sdc.fp);
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}
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return 0;
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}
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|
206
emul/hw/rc2014/sdc.c
Normal file
206
emul/hw/rc2014/sdc.c
Normal file
@ -0,0 +1,206 @@
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#include <stdio.h>
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#include "sdc.h"
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// Add data to crc with polynomial 0x1021
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// https://stackoverflow.com/a/23726131
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static uint16_t crc16(uint16_t crc, uint8_t data)
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{
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uint8_t x = crc >> 8 ^ data;
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x ^= x>>4;
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crc = (crc << 8) ^ ((uint16_t)(x << 12)) ^ ((uint16_t)(x <<5)) ^ ((uint16_t)x);
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return crc;
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}
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void sdc_init(SDC *sdc)
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{
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sdc->selected = false;
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sdc->initstat = 0;
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sdc->recvidx = 0;
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sdc->sendidx = -1;
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sdc->resp = 0xff;
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sdc->fp = NULL;
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sdc->cmd17bytes = -1;
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sdc->cmd24bytes = -2;
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}
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void sdc_cslow(SDC *sdc)
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{
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sdc->selected = true;
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}
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void sdc_cshigh(SDC *sdc)
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{
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sdc->selected = false;
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}
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void sdc_spi_wr(SDC *sdc, uint8_t val)
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{
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if (!sdc->selected) {
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return;
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}
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sdc->resp = 0xff;
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if (sdc->initstat < 8) {
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// not woken yet.
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sdc->initstat++;
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return;
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}
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if (sdc->sendidx >= 0) {
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sdc->resp = sdc->sendbuf[sdc->sendidx++];
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if (sdc->sendidx == 5) {
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sdc->sendidx = -1;
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}
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return;
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}
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if (sdc->cmd17bytes >= 0) {
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if (sdc->fp) {
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sdc->resp = getc(sdc->fp);
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}
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sdc->crc16 = crc16(sdc->crc16, sdc->resp);
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sdc->cmd17bytes++;
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if (sdc->cmd17bytes == 512) {
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sdc->sendbuf[3] = sdc->crc16 >> 8;
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sdc->sendbuf[4] = sdc->crc16 & 0xff;
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sdc->sendidx = 3;
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sdc->cmd17bytes = -1;
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}
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return;
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}
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if (sdc->cmd24bytes == -1) {
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if (val == 0xff) {
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// it's ok to receive idle bytes before the data token.
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return;
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}
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if (val == 0xfe) {
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// data token, good
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sdc->cmd24bytes = 0;
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} else {
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// something is wrong, cancel cmd24
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sdc->cmd24bytes = -2;
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}
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return;
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}
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if (sdc->cmd24bytes >= 0) {
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if (sdc->cmd24bytes < 512) {
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if (sdc->fp) {
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putc(val, sdc->fp);
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}
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sdc->crc16 = crc16(sdc->crc16, val);
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} else if (sdc->cmd24bytes == 512) {
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// CRC MSB
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if (val == (sdc->crc16>>8)) {
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fprintf(stderr, "Good CRC16 MSB\n");
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} else {
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fprintf(stderr, "Bad CRC16 MSB\n");
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}
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} else {
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if (val == (sdc->crc16&0xff)) {
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fprintf(stderr, "Good CRC16 LSB\n");
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} else {
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fprintf(stderr, "Bad CRC16 LSB\n");
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}
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// valid response for CMD24
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sdc->sendbuf[4] = 0x05;
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sdc->sendidx = 4;
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sdc->cmd24bytes = -3;
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}
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sdc->cmd24bytes++;
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return;
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}
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if ((sdc->recvidx == 0) && ((val > 0x7f) || (val < 0x40))) {
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// not a command
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return;
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}
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sdc->recvbuf[sdc->recvidx++] = val;
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if (sdc->recvidx < 6) {
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// incomplete command
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return;
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}
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// Command complete
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val &= 0x3f;
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sdc->recvidx = 0;
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uint8_t *b = sdc->recvbuf;
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uint8_t cmd = b[0] & 0x3f;
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uint16_t arg1 = (b[1] << 8) | b[2];
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uint16_t arg2 = (b[3] << 8) | b[4];
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if (sdc->initstat == 8) {
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// At this stage, we're expecting CMD0
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if (cmd == 0) {
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sdc->initstat++;
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sdc->sendbuf[4] = 0x01;
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sdc->sendidx = 4;
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}
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return;
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}
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if (sdc->initstat == 9) {
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// At this stage, we're expecting CMD8 with 0x1aa arg2
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if ((cmd == 8) && (arg2 == 0x01aa)) {
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sdc->initstat++;
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sdc->sendbuf[0] = 0x01;
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sdc->sendbuf[1] = 0;
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sdc->sendbuf[2] = 0;
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sdc->sendbuf[3] = 0x01;
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sdc->sendbuf[4] = 0xaa;
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sdc->sendidx = 0;
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} else {
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sdc-> initstat = 8;
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}
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return;
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}
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if (sdc->initstat == 10) {
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// At this stage, we're expecting CMD55
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if (cmd == 55) {
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sdc->initstat++;
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sdc->sendbuf[4] = 0x01;
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sdc->sendidx = 4;
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} else {
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sdc->initstat = 8;
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}
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return;
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}
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if (sdc->initstat == 11) {
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// At this stage, we're expecting CMD41
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if ((cmd == 41) && (arg1 == 0x4000)) {
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sdc->initstat++;
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sdc->sendbuf[4] = 0x00;
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sdc->sendidx = 4;
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} else {
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sdc->initstat = 8;
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}
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return;
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}
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// We have a fully initialized card.
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if (cmd == 17) {
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if (sdc->fp) {
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fseek(sdc->fp, arg2*512, SEEK_SET);
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}
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sdc->sendbuf[3] = 0x00;
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// data token
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sdc->sendbuf[4] = 0xfe;
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sdc->sendidx = 3;
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sdc->cmd17bytes = 0;
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sdc->crc16 = 0;
|
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return;
|
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}
|
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if (cmd == 24) {
|
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fprintf(stderr, "cmd24\n");
|
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if (sdc->fp) {
|
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fseek(sdc->fp, arg2*512, SEEK_SET);
|
||||
}
|
||||
sdc->sendbuf[4] = 0x00;
|
||||
sdc->sendidx = 4;
|
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sdc->cmd24bytes = -1;
|
||||
sdc->crc16 = 0;
|
||||
return;
|
||||
}
|
||||
// Simulate success for any unknown command.
|
||||
sdc->sendbuf[4] = 0x00;
|
||||
sdc->sendidx = 4;
|
||||
}
|
||||
|
||||
uint8_t sdc_spi_rd(SDC *sdc)
|
||||
{
|
||||
if (!sdc->selected) {
|
||||
return 0xff;
|
||||
}
|
||||
return sdc->resp;
|
||||
}
|
37
emul/hw/rc2014/sdc.h
Normal file
37
emul/hw/rc2014/sdc.h
Normal file
@ -0,0 +1,37 @@
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
typedef struct {
|
||||
bool selected;
|
||||
// Initialization status. 0 == not woken 8 == woken 9 == CMD0 received
|
||||
// 10 == CMD8 received, 11 == CMD55 received, 12 == CMD41 received (fully
|
||||
// initialized).
|
||||
unsigned int initstat;
|
||||
// We receive commands into this buffer.
|
||||
uint8_t recvbuf[6];
|
||||
// Where the next SPI byte should be stored in recvbuf.
|
||||
unsigned int recvidx;
|
||||
// Buffer to the arguments for a response
|
||||
uint8_t sendbuf[5];
|
||||
// Index of the next byte from sendbuf we should return. If -1, buffer is
|
||||
// empty.
|
||||
int sendidx;
|
||||
// One byte response. When all other response buffers are empty, return
|
||||
// this.
|
||||
uint8_t resp;
|
||||
// File used for contents read/write
|
||||
FILE *fp;
|
||||
// number of bytes read into the current CMD17. -1 means no CMD17 active.
|
||||
int cmd17bytes;
|
||||
// number of bytes received for the current CMD24. -2 means no CMD24 active.
|
||||
// -1 means we're still waiting for the data token.
|
||||
int cmd24bytes;
|
||||
// running crc16 during read and write operations.
|
||||
uint16_t crc16;
|
||||
} SDC;
|
||||
|
||||
void sdc_init(SDC *sdc);
|
||||
void sdc_cslow(SDC *sdc);
|
||||
void sdc_cshigh(SDC *sdc);
|
||||
void sdc_spi_wr(SDC *sdc, uint8_t val);
|
||||
uint8_t sdc_spi_rd(SDC *sdc);
|
@ -15,7 +15,7 @@
|
||||
DUP <0 IF '-' EMIT -1 * THEN
|
||||
_
|
||||
BEGIN
|
||||
DUP '9' > IF DROP EXIT THEN ( stop indicator, we're done )
|
||||
DUP '9' > IF DROP EXIT THEN ( stop indicator, we're done )
|
||||
EMIT
|
||||
AGAIN
|
||||
;
|
||||
@ -32,7 +32,7 @@
|
||||
: .x
|
||||
256 MOD ( ensure < 0x100 )
|
||||
16 /MOD ( l h )
|
||||
_ EMIT ( l )
|
||||
_ EMIT ( l )
|
||||
_ EMIT
|
||||
;
|
||||
|
||||
|
@ -33,7 +33,7 @@
|
||||
0x22 = NOT IF 2+ EXIT THEN
|
||||
( it's a lit, skip to null char )
|
||||
( a )
|
||||
1+ ( we skip by 2, but the loop below is pre-inc... )
|
||||
1+ ( we skip by 2, but the loop below is pre-inc... )
|
||||
BEGIN 1+ DUP C@ NOT UNTIL
|
||||
( skip null char )
|
||||
1+
|
||||
@ -58,17 +58,17 @@
|
||||
)
|
||||
DROP
|
||||
2+ ( o ol a+2 )
|
||||
ROT ROT 2DROP ( a )
|
||||
ROT ROT 2DROP ( a )
|
||||
EXIT
|
||||
THEN
|
||||
ROT ( o a n ol )
|
||||
< IF ( under limit, do nothing )
|
||||
< IF ( under limit, do nothing )
|
||||
SWAP DROP ( a )
|
||||
ELSE
|
||||
( o a )
|
||||
SWAP OVER @ ( a o n )
|
||||
-^ ( a n-o )
|
||||
OVER ! ( a )
|
||||
SWAP OVER @ ( a o n )
|
||||
-^ ( a n-o )
|
||||
OVER ! ( a )
|
||||
THEN
|
||||
ASKIP
|
||||
;
|
||||
|
@ -1,11 +0,0 @@
|
||||
TARGET = os.bin
|
||||
BASEDIR = ../../..
|
||||
ZASM = $(BASEDIR)/emul/zasm/zasm
|
||||
KERNEL = $(BASEDIR)/kernel
|
||||
APPS = $(BASEDIR)/apps
|
||||
|
||||
.PHONY: all
|
||||
all: $(TARGET)
|
||||
$(TARGET): glue.asm
|
||||
$(ZASM) $(KERNEL) $(APPS) < glue.asm > $@
|
||||
|
@ -1,87 +0,0 @@
|
||||
; classic RC2014 setup (8K ROM + 32K RAM) and a stock Serial I/O module
|
||||
; The RAM module is selected on A15, so it has the range 0x8000-0xffff
|
||||
.equ RAMSTART 0x8000
|
||||
.equ RAMEND 0xffff
|
||||
.equ ACIA_CTL 0x80 ; Control and status. RS off.
|
||||
.equ ACIA_IO 0x81 ; Transmit. RS on.
|
||||
|
||||
jp init
|
||||
|
||||
; interrupt hook
|
||||
.fill 0x38-$
|
||||
jp aciaInt
|
||||
|
||||
.inc "err.h"
|
||||
.inc "ascii.h"
|
||||
.inc "blkdev.h"
|
||||
.inc "core.asm"
|
||||
.inc "str.asm"
|
||||
.equ ACIA_RAMSTART RAMSTART
|
||||
.inc "acia.asm"
|
||||
|
||||
.equ MMAP_START 0xd000
|
||||
.inc "mmap.asm"
|
||||
|
||||
.equ BLOCKDEV_RAMSTART ACIA_RAMEND
|
||||
.equ BLOCKDEV_COUNT 1
|
||||
.inc "blockdev.asm"
|
||||
; List of devices
|
||||
.dw mmapGetB, mmapPutB
|
||||
|
||||
.equ STDIO_RAMSTART BLOCKDEV_RAMEND
|
||||
.equ STDIO_GETC aciaGetC
|
||||
.equ STDIO_PUTC aciaPutC
|
||||
.inc "stdio.asm"
|
||||
|
||||
.equ AT28W_RAMSTART STDIO_RAMEND
|
||||
.inc "at28w/main.asm"
|
||||
|
||||
; *** BASIC ***
|
||||
|
||||
; RAM space used in different routines for short term processing.
|
||||
.equ SCRATCHPAD_SIZE STDIO_BUFSIZE
|
||||
.equ SCRATCHPAD AT28W_RAMEND
|
||||
.inc "lib/util.asm"
|
||||
.inc "lib/ari.asm"
|
||||
.inc "lib/parse.asm"
|
||||
.inc "lib/fmt.asm"
|
||||
.equ EXPR_PARSE parseLiteralOrVar
|
||||
.inc "lib/expr.asm"
|
||||
.inc "basic/util.asm"
|
||||
.inc "basic/parse.asm"
|
||||
.inc "basic/tok.asm"
|
||||
.equ VAR_RAMSTART SCRATCHPAD+SCRATCHPAD_SIZE
|
||||
.inc "basic/var.asm"
|
||||
.equ BUF_RAMSTART VAR_RAMEND
|
||||
.inc "basic/buf.asm"
|
||||
.inc "basic/blk.asm"
|
||||
.equ BAS_RAMSTART BUF_RAMEND
|
||||
.inc "basic/main.asm"
|
||||
|
||||
init:
|
||||
di
|
||||
; setup stack
|
||||
ld sp, RAMEND
|
||||
im 1
|
||||
|
||||
call aciaInit
|
||||
xor a
|
||||
ld de, BLOCKDEV_SEL
|
||||
call blkSel
|
||||
|
||||
call basInit
|
||||
ld hl, basFindCmdExtra
|
||||
ld (BAS_FINDHOOK), hl
|
||||
ei
|
||||
jp basStart
|
||||
|
||||
basFindCmdExtra:
|
||||
ld hl, basBLKCmds
|
||||
call basFindCmd
|
||||
ret z
|
||||
ld hl, .mycmds
|
||||
jp basFindCmd
|
||||
.mycmds:
|
||||
.db "at28w", 0
|
||||
.dw at28wMain
|
||||
.db 0xff
|
@ -1,43 +0,0 @@
|
||||
; If you find youself needing to write to an EEPROM through a shell that isn't
|
||||
; built for this, compile this dependency-less code (change memory offsets as
|
||||
; needed) and run it in a USR-like fashion.
|
||||
|
||||
ld bc, 0x1000 ; bytecount to write
|
||||
ld de, 0xd000 ; source data
|
||||
ld hl, 0x2000 ; dest EEPROM memory mapping
|
||||
|
||||
loop:
|
||||
ld a, (de)
|
||||
ld (hl), a
|
||||
push de ; --> lvl 1
|
||||
push bc ; --> lvl 2
|
||||
ld bc, 0x2000 ; Should be plenty enough to go > 10ms
|
||||
ld e, a ; save expected data for verification
|
||||
wait:
|
||||
; as long as writing operation is running, IO/6 will toggle at each
|
||||
; read attempt and IO/7 will be the opposite of what was written. Simply
|
||||
; wait until the read operation yields the same value as what we've
|
||||
; written
|
||||
ld a, (hl)
|
||||
cp e
|
||||
jr z, waitend
|
||||
dec bc
|
||||
ld a, b
|
||||
or c
|
||||
jr nz, wait
|
||||
; mismatch
|
||||
pop bc ; <-- lvl 2
|
||||
pop de ; <-- lvl 1
|
||||
ld a, 1 ; nonzero
|
||||
or a ; unset Z
|
||||
ret
|
||||
waitend:
|
||||
pop bc ; <-- lvl 2
|
||||
pop de ; <-- lvl 1
|
||||
inc hl
|
||||
inc de
|
||||
dec bc
|
||||
ld a, b
|
||||
or c
|
||||
jr nz, loop
|
||||
ret ; Z already set
|
Loading…
Reference in New Issue
Block a user