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6 Commits

Author SHA1 Message Date
Virgil Dupras
19d94dfb47 recipes/rc2014: stage1 is too big! saving some space
stripfc requires 2 spaces before "(" to strip a comment. This was
a low hanging fruit for me to get stage1.bin under the 8K line.

That thing is getting tight...
2020-04-17 21:10:48 -04:00
Virgil Dupras
287213fc68 recipes/rc2014/eeprom: remove old stuff 2020-04-17 21:10:20 -04:00
Virgil Dupras
82044454d5 Merge branch 'master' into forth 2020-04-17 20:39:08 -04:00
Virgil Dupras
9c41744e46 emul/hw/rc2014: implement blk write in sdc
All of that should help me implement sdc support much faster in
Forth.
2020-04-17 20:19:55 -04:00
Virgil Dupras
7544b3834b emul/hw/rc2014: implement blkread in sdc
I now get to "fls" in recipes/rc2014/sdcard!
2020-04-17 19:10:22 -04:00
Virgil Dupras
ae470397d7 emul/hw/rc2014: add sdc emulator (wip)
so far, it goes through initialization with the rc2014/sdcard recipe.
2020-04-17 15:11:32 -04:00
10 changed files with 293 additions and 154 deletions

View File

@ -29,7 +29,7 @@ ACIA_MEM: Address in memory that can be used variables shared
: ACIA$
H@ DUP DUP ACIA( ! ACIAR> !
1+ ACIAW> ! ( write index starts one position later )
1+ ACIAW> ! ( write index starts one position later )
ACIABUFSZ ALLOT
H@ ACIA) !
( setup ACIA
@ -42,7 +42,7 @@ ACIA_MEM: Address in memory that can be used variables shared
( setup interrupt )
( 4e == INTJUMP )
0xc3 0x4e RAM+ C! ( JP upcode )
0xc3 0x4e RAM+ C! ( JP upcode )
['] ~ACIA 0x4f RAM+ !
(im1)
;

View File

@ -1,5 +1,5 @@
EXTOBJS = ../../emul.o ../../libz80/libz80.o
OBJS = acia.o classic.o
OBJS = acia.o sdc.o classic.o
TARGET = classic
.PHONY: all

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@ -13,13 +13,18 @@
#include <termios.h>
#include "../../emul.h"
#include "acia.h"
#include "sdc.h"
#define RAMSTART 0x8000
#define ACIA_CTL_PORT 0x80
#define ACIA_DATA_PORT 0x81
#define SDC_CSHIGH 0x06
#define SDC_CSLOW 0x05
#define SDC_SPI 0x04
#define MAX_ROMSIZE 0x2000
static ACIA acia;
static SDC sdc;
static uint8_t iord_acia_ctl()
{
@ -41,10 +46,30 @@ static void iowr_acia_data(uint8_t val)
acia_data_wr(&acia, val);
}
static uint8_t iord_sdc_spi()
{
return sdc_spi_rd(&sdc);
}
static void iowr_sdc_spi(uint8_t val)
{
sdc_spi_wr(&sdc, val);
}
static void iowr_sdc_cshigh(uint8_t val)
{
sdc_cshigh(&sdc);
}
static void iowr_sdc_cslow(uint8_t val)
{
sdc_cslow(&sdc);
}
int main(int argc, char *argv[])
{
if (argc != 2) {
fprintf(stderr, "Usage: ./classic /path/to/rom\n");
if (argc < 2) {
fprintf(stderr, "Usage: ./classic /path/to/rom [sdcard.img]\n");
return 1;
}
FILE *fp = fopen(argv[1], "r");
@ -81,10 +106,19 @@ int main(int argc, char *argv[])
}
acia_init(&acia);
sdc_init(&sdc);
if (argc == 3) {
fprintf(stderr, "Setting up SD card image\n");
sdc.fp = fopen(argv[2], "r+");
}
m->iord[ACIA_CTL_PORT] = iord_acia_ctl;
m->iord[ACIA_DATA_PORT] = iord_acia_data;
m->iowr[ACIA_CTL_PORT] = iowr_acia_ctl;
m->iowr[ACIA_DATA_PORT] = iowr_acia_data;
m->iord[SDC_SPI] = iord_sdc_spi;
m->iowr[SDC_SPI] = iowr_sdc_spi;
m->iowr[SDC_CSHIGH] = iowr_sdc_cshigh;
m->iowr[SDC_CSLOW] = iowr_sdc_cslow;
char tosend = 0;
while (emul_step()) {
@ -126,5 +160,8 @@ int main(int argc, char *argv[])
tcsetattr(0, TCSADRAIN, &saved_term);
emul_printdebug();
}
if (sdc.fp) {
fclose(sdc.fp);
}
return 0;
}

206
emul/hw/rc2014/sdc.c Normal file
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@ -0,0 +1,206 @@
#include <stdio.h>
#include "sdc.h"
// Add data to crc with polynomial 0x1021
// https://stackoverflow.com/a/23726131
static uint16_t crc16(uint16_t crc, uint8_t data)
{
uint8_t x = crc >> 8 ^ data;
x ^= x>>4;
crc = (crc << 8) ^ ((uint16_t)(x << 12)) ^ ((uint16_t)(x <<5)) ^ ((uint16_t)x);
return crc;
}
void sdc_init(SDC *sdc)
{
sdc->selected = false;
sdc->initstat = 0;
sdc->recvidx = 0;
sdc->sendidx = -1;
sdc->resp = 0xff;
sdc->fp = NULL;
sdc->cmd17bytes = -1;
sdc->cmd24bytes = -2;
}
void sdc_cslow(SDC *sdc)
{
sdc->selected = true;
}
void sdc_cshigh(SDC *sdc)
{
sdc->selected = false;
}
void sdc_spi_wr(SDC *sdc, uint8_t val)
{
if (!sdc->selected) {
return;
}
sdc->resp = 0xff;
if (sdc->initstat < 8) {
// not woken yet.
sdc->initstat++;
return;
}
if (sdc->sendidx >= 0) {
sdc->resp = sdc->sendbuf[sdc->sendidx++];
if (sdc->sendidx == 5) {
sdc->sendidx = -1;
}
return;
}
if (sdc->cmd17bytes >= 0) {
if (sdc->fp) {
sdc->resp = getc(sdc->fp);
}
sdc->crc16 = crc16(sdc->crc16, sdc->resp);
sdc->cmd17bytes++;
if (sdc->cmd17bytes == 512) {
sdc->sendbuf[3] = sdc->crc16 >> 8;
sdc->sendbuf[4] = sdc->crc16 & 0xff;
sdc->sendidx = 3;
sdc->cmd17bytes = -1;
}
return;
}
if (sdc->cmd24bytes == -1) {
if (val == 0xff) {
// it's ok to receive idle bytes before the data token.
return;
}
if (val == 0xfe) {
// data token, good
sdc->cmd24bytes = 0;
} else {
// something is wrong, cancel cmd24
sdc->cmd24bytes = -2;
}
return;
}
if (sdc->cmd24bytes >= 0) {
if (sdc->cmd24bytes < 512) {
if (sdc->fp) {
putc(val, sdc->fp);
}
sdc->crc16 = crc16(sdc->crc16, val);
} else if (sdc->cmd24bytes == 512) {
// CRC MSB
if (val == (sdc->crc16>>8)) {
fprintf(stderr, "Good CRC16 MSB\n");
} else {
fprintf(stderr, "Bad CRC16 MSB\n");
}
} else {
if (val == (sdc->crc16&0xff)) {
fprintf(stderr, "Good CRC16 LSB\n");
} else {
fprintf(stderr, "Bad CRC16 LSB\n");
}
// valid response for CMD24
sdc->sendbuf[4] = 0x05;
sdc->sendidx = 4;
sdc->cmd24bytes = -3;
}
sdc->cmd24bytes++;
return;
}
if ((sdc->recvidx == 0) && ((val > 0x7f) || (val < 0x40))) {
// not a command
return;
}
sdc->recvbuf[sdc->recvidx++] = val;
if (sdc->recvidx < 6) {
// incomplete command
return;
}
// Command complete
val &= 0x3f;
sdc->recvidx = 0;
uint8_t *b = sdc->recvbuf;
uint8_t cmd = b[0] & 0x3f;
uint16_t arg1 = (b[1] << 8) | b[2];
uint16_t arg2 = (b[3] << 8) | b[4];
if (sdc->initstat == 8) {
// At this stage, we're expecting CMD0
if (cmd == 0) {
sdc->initstat++;
sdc->sendbuf[4] = 0x01;
sdc->sendidx = 4;
}
return;
}
if (sdc->initstat == 9) {
// At this stage, we're expecting CMD8 with 0x1aa arg2
if ((cmd == 8) && (arg2 == 0x01aa)) {
sdc->initstat++;
sdc->sendbuf[0] = 0x01;
sdc->sendbuf[1] = 0;
sdc->sendbuf[2] = 0;
sdc->sendbuf[3] = 0x01;
sdc->sendbuf[4] = 0xaa;
sdc->sendidx = 0;
} else {
sdc-> initstat = 8;
}
return;
}
if (sdc->initstat == 10) {
// At this stage, we're expecting CMD55
if (cmd == 55) {
sdc->initstat++;
sdc->sendbuf[4] = 0x01;
sdc->sendidx = 4;
} else {
sdc->initstat = 8;
}
return;
}
if (sdc->initstat == 11) {
// At this stage, we're expecting CMD41
if ((cmd == 41) && (arg1 == 0x4000)) {
sdc->initstat++;
sdc->sendbuf[4] = 0x00;
sdc->sendidx = 4;
} else {
sdc->initstat = 8;
}
return;
}
// We have a fully initialized card.
if (cmd == 17) {
if (sdc->fp) {
fseek(sdc->fp, arg2*512, SEEK_SET);
}
sdc->sendbuf[3] = 0x00;
// data token
sdc->sendbuf[4] = 0xfe;
sdc->sendidx = 3;
sdc->cmd17bytes = 0;
sdc->crc16 = 0;
return;
}
if (cmd == 24) {
fprintf(stderr, "cmd24\n");
if (sdc->fp) {
fseek(sdc->fp, arg2*512, SEEK_SET);
}
sdc->sendbuf[4] = 0x00;
sdc->sendidx = 4;
sdc->cmd24bytes = -1;
sdc->crc16 = 0;
return;
}
// Simulate success for any unknown command.
sdc->sendbuf[4] = 0x00;
sdc->sendidx = 4;
}
uint8_t sdc_spi_rd(SDC *sdc)
{
if (!sdc->selected) {
return 0xff;
}
return sdc->resp;
}

37
emul/hw/rc2014/sdc.h Normal file
View File

@ -0,0 +1,37 @@
#include <stdint.h>
#include <stdbool.h>
typedef struct {
bool selected;
// Initialization status. 0 == not woken 8 == woken 9 == CMD0 received
// 10 == CMD8 received, 11 == CMD55 received, 12 == CMD41 received (fully
// initialized).
unsigned int initstat;
// We receive commands into this buffer.
uint8_t recvbuf[6];
// Where the next SPI byte should be stored in recvbuf.
unsigned int recvidx;
// Buffer to the arguments for a response
uint8_t sendbuf[5];
// Index of the next byte from sendbuf we should return. If -1, buffer is
// empty.
int sendidx;
// One byte response. When all other response buffers are empty, return
// this.
uint8_t resp;
// File used for contents read/write
FILE *fp;
// number of bytes read into the current CMD17. -1 means no CMD17 active.
int cmd17bytes;
// number of bytes received for the current CMD24. -2 means no CMD24 active.
// -1 means we're still waiting for the data token.
int cmd24bytes;
// running crc16 during read and write operations.
uint16_t crc16;
} SDC;
void sdc_init(SDC *sdc);
void sdc_cslow(SDC *sdc);
void sdc_cshigh(SDC *sdc);
void sdc_spi_wr(SDC *sdc, uint8_t val);
uint8_t sdc_spi_rd(SDC *sdc);

View File

@ -15,7 +15,7 @@
DUP <0 IF '-' EMIT -1 * THEN
_
BEGIN
DUP '9' > IF DROP EXIT THEN ( stop indicator, we're done )
DUP '9' > IF DROP EXIT THEN ( stop indicator, we're done )
EMIT
AGAIN
;
@ -32,7 +32,7 @@
: .x
256 MOD ( ensure < 0x100 )
16 /MOD ( l h )
_ EMIT ( l )
_ EMIT ( l )
_ EMIT
;

View File

@ -33,7 +33,7 @@
0x22 = NOT IF 2+ EXIT THEN
( it's a lit, skip to null char )
( a )
1+ ( we skip by 2, but the loop below is pre-inc... )
1+ ( we skip by 2, but the loop below is pre-inc... )
BEGIN 1+ DUP C@ NOT UNTIL
( skip null char )
1+
@ -58,17 +58,17 @@
)
DROP
2+ ( o ol a+2 )
ROT ROT 2DROP ( a )
ROT ROT 2DROP ( a )
EXIT
THEN
ROT ( o a n ol )
< IF ( under limit, do nothing )
< IF ( under limit, do nothing )
SWAP DROP ( a )
ELSE
( o a )
SWAP OVER @ ( a o n )
-^ ( a n-o )
OVER ! ( a )
SWAP OVER @ ( a o n )
-^ ( a n-o )
OVER ! ( a )
THEN
ASKIP
;

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@ -1,11 +0,0 @@
TARGET = os.bin
BASEDIR = ../../..
ZASM = $(BASEDIR)/emul/zasm/zasm
KERNEL = $(BASEDIR)/kernel
APPS = $(BASEDIR)/apps
.PHONY: all
all: $(TARGET)
$(TARGET): glue.asm
$(ZASM) $(KERNEL) $(APPS) < glue.asm > $@

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@ -1,87 +0,0 @@
; classic RC2014 setup (8K ROM + 32K RAM) and a stock Serial I/O module
; The RAM module is selected on A15, so it has the range 0x8000-0xffff
.equ RAMSTART 0x8000
.equ RAMEND 0xffff
.equ ACIA_CTL 0x80 ; Control and status. RS off.
.equ ACIA_IO 0x81 ; Transmit. RS on.
jp init
; interrupt hook
.fill 0x38-$
jp aciaInt
.inc "err.h"
.inc "ascii.h"
.inc "blkdev.h"
.inc "core.asm"
.inc "str.asm"
.equ ACIA_RAMSTART RAMSTART
.inc "acia.asm"
.equ MMAP_START 0xd000
.inc "mmap.asm"
.equ BLOCKDEV_RAMSTART ACIA_RAMEND
.equ BLOCKDEV_COUNT 1
.inc "blockdev.asm"
; List of devices
.dw mmapGetB, mmapPutB
.equ STDIO_RAMSTART BLOCKDEV_RAMEND
.equ STDIO_GETC aciaGetC
.equ STDIO_PUTC aciaPutC
.inc "stdio.asm"
.equ AT28W_RAMSTART STDIO_RAMEND
.inc "at28w/main.asm"
; *** BASIC ***
; RAM space used in different routines for short term processing.
.equ SCRATCHPAD_SIZE STDIO_BUFSIZE
.equ SCRATCHPAD AT28W_RAMEND
.inc "lib/util.asm"
.inc "lib/ari.asm"
.inc "lib/parse.asm"
.inc "lib/fmt.asm"
.equ EXPR_PARSE parseLiteralOrVar
.inc "lib/expr.asm"
.inc "basic/util.asm"
.inc "basic/parse.asm"
.inc "basic/tok.asm"
.equ VAR_RAMSTART SCRATCHPAD+SCRATCHPAD_SIZE
.inc "basic/var.asm"
.equ BUF_RAMSTART VAR_RAMEND
.inc "basic/buf.asm"
.inc "basic/blk.asm"
.equ BAS_RAMSTART BUF_RAMEND
.inc "basic/main.asm"
init:
di
; setup stack
ld sp, RAMEND
im 1
call aciaInit
xor a
ld de, BLOCKDEV_SEL
call blkSel
call basInit
ld hl, basFindCmdExtra
ld (BAS_FINDHOOK), hl
ei
jp basStart
basFindCmdExtra:
ld hl, basBLKCmds
call basFindCmd
ret z
ld hl, .mycmds
jp basFindCmd
.mycmds:
.db "at28w", 0
.dw at28wMain
.db 0xff

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@ -1,43 +0,0 @@
; If you find youself needing to write to an EEPROM through a shell that isn't
; built for this, compile this dependency-less code (change memory offsets as
; needed) and run it in a USR-like fashion.
ld bc, 0x1000 ; bytecount to write
ld de, 0xd000 ; source data
ld hl, 0x2000 ; dest EEPROM memory mapping
loop:
ld a, (de)
ld (hl), a
push de ; --> lvl 1
push bc ; --> lvl 2
ld bc, 0x2000 ; Should be plenty enough to go > 10ms
ld e, a ; save expected data for verification
wait:
; as long as writing operation is running, IO/6 will toggle at each
; read attempt and IO/7 will be the opposite of what was written. Simply
; wait until the read operation yields the same value as what we've
; written
ld a, (hl)
cp e
jr z, waitend
dec bc
ld a, b
or c
jr nz, wait
; mismatch
pop bc ; <-- lvl 2
pop de ; <-- lvl 1
ld a, 1 ; nonzero
or a ; unset Z
ret
waitend:
pop bc ; <-- lvl 2
pop de ; <-- lvl 1
inc hl
inc de
dec bc
ld a, b
or c
jr nz, loop
ret ; Z already set