avra: add CBI and SBI

This completes instruction support for the Blink tn45 example.

apps/zasm/avr.asm

@@ -36,54 +36,49 @@ instrNames:
 .db "ADC", 0
 .db "ADD", 0
 .db "AND", 0
-.db "CLR", 0
+.db "ASR", 0
-.db "CP", 0
-.db "CPC", 0
-.db "CPSE", 0
-.db "EOR", 0
-.db "MOV", 0
-.db "MUL", 0
-.db "OR", 0
-.db "SBC", 0
-.db "SUB", 0
-.equ	I_ANDI	31
-.db "ANDI", 0
-.db "CPI", 0
-.db "LDI", 0
-.db "ORI", 0
-.db "SBCI", 0
-.db "SBR", 0
-.db "SUBI", 0
-.equ	I_BLD	38
 .db "BLD", 0
-.db "BST", 0
-.db "SBRC", 0
-.db "SBRS", 0
-.equ	I_RCALL	42
-.db "RCALL", 0
-.db "RJMP", 0
-.equ	I_IN	44
-.db "IN", 0
-.equ	I_OUT	45
-.db "OUT", 0
-; no arg (from here, instrTbl16)
-.equ	I_BREAK	46
 .db "BREAK", 0
+.db "BST", 0
 .db "CLC", 0
 .db "CLH", 0
 .db "CLI", 0
 .db "CLN", 0
+.db "CLR", 0
 .db "CLS", 0
 .db "CLT", 0
 .db "CLV", 0
 .db "CLZ", 0
+.db "COM", 0
+.db "CP", 0
+.db "CPC", 0
+.db "CPSE", 0
+.db "DEC", 0
 .db "EICALL", 0
 .db "EIJMP", 0
+.db "EOR", 0
 .db "ICALL", 0
 .db "IJMP", 0
+.db "IN", 0
+.db "INC", 0
+.db "LAC", 0
+.db "LAS", 0
+.db "LAT", 0
+.db "LSR", 0
+.db "MOV", 0
+.db "MUL", 0
+.db "NEG", 0
 .db "NOP", 0
+.db "OR", 0
+.db "OUT", 0
+.db "POP", 0
+.db "PUSH", 0
 .db "RET", 0
 .db "RETI", 0
+.db "ROR", 0
+.db "SBC", 0
+.db "SBRC", 0
+.db "SBRS", 0
 .db "SEC", 0
 .db "SEH", 0
 .db "SEI", 0
@@ -93,23 +88,24 @@ instrNames:
 .db "SEV", 0
 .db "SEZ", 0
 .db "SLEEP", 0
-.db "WDR", 0
+.db "SUB", 0
-; Rd(5)
-.equ	I_ASR	72
-.db "ASR", 0
-.db "COM", 0
-.db "DEC", 0
-.db "INC", 0
-.db "LAC", 0
-.db "LAS", 0
-.db "LAT", 0
-.db "LSR", 0
-.db "NEG", 0
-.db "POP", 0
-.db "PUSH", 0
-.db "ROR", 0
 .db "SWAP", 0
+.db "WDR", 0
 .db "XCH", 0
+.equ	I_ANDI	77
+.db "ANDI", 0
+.db "CPI", 0
+.db "LDI", 0
+.db "ORI", 0
+.db "SBCI", 0
+.db "SBR", 0
+.db "SUBI", 0
+.equ	I_RCALL	84
+.db "RCALL", 0
+.db "RJMP", 0
+.equ	I_CBI	86
+.db "CBI", 0
+.db "SBI", 0
 .db 0xff
 
 ; Instruction table
@@ -134,57 +130,55 @@ instrNames:
 
 ; In the same order as in instrNames
 instrTbl:
-; Rd(5) + Rd(5): XXXXXXrd ddddrrrr
+; Regular processing: Rd with second arg having its 4 low bits placed in C's
-.db 0x02, 0b00011100, 0x00		; ADC
+; 3:0 bits and the 4 high bits being place in B's 4:1 bits
-.db 0x02, 0b00001100, 0x00		; ADD
+; No args are also there.
-.db 0x02, 0b00100000, 0x00		; AND
+.db 0x02, 0b00011100, 0x00		; ADC Rd, Rr
-.db 0x41, 0b00100100, 0x00		; CLR	(Rr copies Rd)
+.db 0x02, 0b00001100, 0x00		; ADD Rd, Rr
-.db 0x02, 0b00010100, 0x00		; CP
+.db 0x02, 0b00100000, 0x00		; AND Rd, Rr
-.db 0x02, 0b00000100, 0x00		; CPC
+.db 0x01, 0b10010100, 0b00000101	; ASR Rd
-.db 0x02, 0b00010000, 0x00		; CPSE
+.db 0x05, 0b11111000, 0x00		; BLD Rd, b
-.db 0x02, 0b00100100, 0x00		; EOR
-.db 0x02, 0b00101100, 0x00		; MOV
-.db 0x02, 0b10011100, 0x00		; MUL
-.db 0x02, 0b00101000, 0x00		; OR
-.db 0x02, 0b00001000, 0x00		; SBC
-.db 0x02, 0b00011000, 0x00		; SUB
-; Rd(4) + K(8): XXXXKKKK ddddKKKK
-.db 0x04, 0b01110000, 0x00		; ANDI
-.db 0x04, 0b00110000, 0x00		; CPI
-.db 0x04, 0b11100000, 0x00		; LDI
-.db 0x04, 0b01100000, 0x00		; ORI
-.db 0x04, 0b01000000, 0x00		; SBCI
-.db 0x04, 0b01100000, 0x00		; SBR
-.db 0x04, 0b01010000, 0x00		; SUBI
-; Rd(5) + bit: XXXXXXXd ddddXbbb: lonely bit in LSB is 0 in all cases, so we
-; ignore it.
-.db 0x05, 0b11111000, 0x00		; BLD
-.db 0x05, 0b11111010, 0x00		; BST
-.db 0x05, 0b11111100, 0x00		; SBRC
-.db 0x05, 0b11111110, 0x00		; SBRS
-; k(12): XXXXkkkk kkkkkkkk
-.db 0x00, 0b11010000, 0x00		; RCALL
-.db 0x00, 0b11000000, 0x00		; RJMP
-; IN and OUT
-.db 0x07, 0b10110000, 0x00		; IN
-.db 0x87, 0b10111000, 0x00		; OUT (args reversed)
-; no arg
 .db 0x00, 0b10010101, 0b10011000	; BREAK
+.db 0x05, 0b11111010, 0x00		; BST Rd, b
 .db 0x00, 0b10010100, 0b10001000	; CLC
 .db 0x00, 0b10010100, 0b11011000	; CLH
 .db 0x00, 0b10010100, 0b11111000	; CLI
 .db 0x00, 0b10010100, 0b10101000	; CLN
+.db 0x41, 0b00100100, 0x00		; CLR Rd (Bit 6)
 .db 0x00, 0b10010100, 0b11001000	; CLS
 .db 0x00, 0b10010100, 0b11101000	; CLT
 .db 0x00, 0b10010100, 0b10111000	; CLV
 .db 0x00, 0b10010100, 0b10011000	; CLZ
+.db 0x01, 0b10010100, 0b00000000	; COM Rd
+.db 0x02, 0b00010100, 0x00		; CP Rd, Rr
+.db 0x02, 0b00000100, 0x00		; CPC Rd, Rr
+.db 0x02, 0b00010000, 0x00		; CPSE Rd, Rr
+.db 0x01, 0b10010100, 0b00001010	; DEC Rd
 .db 0x00, 0b10010101, 0b00011001	; EICALL
 .db 0x00, 0b10010100, 0b00011001	; EIJMP
+.db 0x02, 0b00100100, 0x00		; EOR Rd, Rr
 .db 0x00, 0b10010101, 0b00001001	; ICALL
 .db 0x00, 0b10010100, 0b00001001	; IJMP
+.db 0x07, 0b10110000, 0x00		; IN Rd, A
+.db 0x01, 0b10010100, 0b00000011	; INC Rd
+.db 0x01, 0b10010010, 0b00000110	; LAC Rd
+.db 0x01, 0b10010010, 0b00000101	; LAS Rd
+.db 0x01, 0b10010010, 0b00000111	; LAT Rd
+.db 0x01, 0b10010100, 0b00000110	; LSR Rd
 .db 0x00, 0b00000000, 0b00000000	; NOP
+.db 0x02, 0b00101100, 0x00		; MOV Rd, Rr
+.db 0x02, 0b10011100, 0x00		; MUL Rd, Rr
+.db 0x01, 0b10010100, 0b00000001	; NEG Rd
+.db 0x02, 0b00101000, 0x00		; OR Rd, Rr
+.db 0x87, 0b10111000, 0x00		; OUT A, Rr (Bit 7)
+.db 0x01, 0b10010000, 0b00001111	; POP Rd
+.db 0x01, 0b10010010, 0b00001111	; PUSH Rd
 .db 0x00, 0b10010101, 0b00001000	; RET
 .db 0x00, 0b10010101, 0b00011000	; RETI
+.db 0x01, 0b10010100, 0b00000111	; ROR Rd
+.db 0x02, 0b00001000, 0x00		; SBC Rd, Rr
+.db 0x05, 0b11111100, 0x00		; SBRC Rd, b
+.db 0x05, 0b11111110, 0x00		; SBRS Rd, b
 .db 0x00, 0b10010100, 0b00001000	; SEC
 .db 0x00, 0b10010100, 0b01011000	; SEH
 .db 0x00, 0b10010100, 0b01111000	; SEI
@@ -194,22 +188,24 @@ instrTbl:
 .db 0x00, 0b10010100, 0b00111000	; SEV
 .db 0x00, 0b10010100, 0b00011000	; SEZ
 .db 0x00, 0b10010101, 0b10001000	; SLEEP
+.db 0x02, 0b00011000, 0x00		; SUB Rd, Rr
+.db 0x01, 0b10010100, 0b00000010	; SWAP Rd
 .db 0x00, 0b10010101, 0b10101000	; WDR
-; Rd(5): XXXXXXXd ddddXXXX
+.db 0x01, 0b10010010, 0b00000100	; XCH Rd
-.db 0x01, 0b10010100, 0b00000101	; ASR
+; Rd(4) + K(8): XXXXKKKK ddddKKKK
-.db 0x01, 0b10010100, 0b00000000	; COM
+.db 0x04, 0b01110000, 0x00		; ANDI
-.db 0x01, 0b10010100, 0b00001010	; DEC
+.db 0x04, 0b00110000, 0x00		; CPI
-.db 0x01, 0b10010100, 0b00000011	; INC
+.db 0x04, 0b11100000, 0x00		; LDI
-.db 0x01, 0b10010010, 0b00000110	; LAC
+.db 0x04, 0b01100000, 0x00		; ORI
-.db 0x01, 0b10010010, 0b00000101	; LAS
+.db 0x04, 0b01000000, 0x00		; SBCI
-.db 0x01, 0b10010010, 0b00000111	; LAT
+.db 0x04, 0b01100000, 0x00		; SBR
-.db 0x01, 0b10010100, 0b00000110	; LSR
+.db 0x04, 0b01010000, 0x00		; SUBI
-.db 0x01, 0b10010100, 0b00000001	; NEG
+; k(12): XXXXkkkk kkkkkkkk
-.db 0x01, 0b10010000, 0b00001111	; POP
+.db 0x08, 0b11010000, 0x00		; RCALL k
-.db 0x01, 0b10010010, 0b00001111	; PUSH
+.db 0x08, 0b11000000, 0x00		; RJMP k
-.db 0x01, 0b10010100, 0b00000111	; ROR
+; A(5) + bit: XXXXXXXX AAAAAbbb
-.db 0x01, 0b10010100, 0b00000010	; SWAP
+.db 0x09, 0b10011000, 0x00		; CBI A, b
-.db 0x01, 0b10010010, 0b00000100	; XCH
+.db 0x09, 0b10011010, 0x00		; SBI A, b
 
 ; Same signature as getInstID in instr.asm
 ; Reads string in (HL) and returns the corresponding ID (I_*) in A. Sets Z if
@@ -271,7 +267,7 @@ parseInstruction:
 	push	hl \ pop ix	; IX is now our tblrow
 	ld	hl, 0
 	or	a
-	jr	z, .noarg
+	jr	z, .spit	; No arg? spit right away
 	and	0xf		; lower nibble
 	dec	a		; argspec index is 1-based
 	ld	hl, argSpecs
@@ -286,7 +282,6 @@ parseInstruction:
 	call	nz, .swapHL	; Bit 7 set, swap H and L
 	call	_parseArgs
 	ret	nz
-.noarg:
 	; *** Step 3: place arguments in binary upcode and spit.
 	; (IX) is table row
 	; Parse arg values now in H and L
@@ -297,69 +292,32 @@ parseInstruction:
 	call	nz, .cpHintoL	; Bit 6 set, copy H into L
 	ld	a, e		; InstrID
 	cp	I_ANDI
-	jr	c, .spitRd5Rr5
+	jr	c, .spitRegular
-	cp	I_BLD
-	jr	c, .spitRdK8
 	cp	I_RCALL
-	jr	c, .spitRdBit
+	jr	c, .spitRdK8
-	cp	I_IN
+	cp	I_CBI
-	jr	c, .spitK12
+	jr	c, .spitk12
-	cp	I_BREAK
+	; spit A(5) + bit
-	jp	c, .spitINOUT
-	cp	I_ASR
-	jp	c, .spit	; no arg
-	; spitRd5
 	ld	a, h
+	rla \ rla \ rla
+	or	l
+	ld	c, a
+	jr	.spit
+.spitRegular:
+	; Regular process which places H and L, ORring it with upcode. Works
+	; in most cases.
 	call	.placeRd
-	jp	.spit
+	call	.placeRr
-.spitRd5Rr5:
+	jr	.spit
-	ld	a, h
-	call	.placeRd
-	ld	a, l
-	; let's start with the 4 lower bits
-	and	0xf
-	or	c
-	; We now have our LSB in A. Let's spit it now.
-	call	ioPutB
-	ld	a, l
-	; and now that last high bit, currently bit 4, which must become bit 1
-	and	0b00010000
-	rra \ rra \ rra
-	or	b
-	ld	b, a
-	jp	.spitMSB
 
 .spitRdK8:
-	ld	a, h		; Rd
 	call	.placeRd
-	ld	a, l		; K
+	call	.placeRr
-	; let's start with the 4 lower bits
+	rr	b		; K(8) start at B's 1st bit, not 2nd
-	and	0xf
+	jr	.spit
-	or	c
-	; We now have our LSB in A. Let's spit it now.
-	call	ioPutB
-	ld	a, l
-	; and now those high 4 bits
-	and	0xf0
-	rra \ rra \ rra \ rra
-	ld	b, a
-	jp	.spitMSB
 
-.spitRdBit:
+.spitk12:
-	ld	a, h
+	; k(12) in HL
-	call	.placeRd
-	or	l
-	; LSB is in A and is ready to go
-	call	ioPutB
-	jr	.spitMSB
-
-.spitK12:
-	; Let's deal with the upcode constant before we destroy IX below
-	ld	b, (ix+1)
-	call	readWord
-	call	parseExpr
-	ret	nz
-	push	ix \ pop hl
 	; We're doing the same dance as in _readk7. See comments there.
 	ld	de, 0xfff
 	add	hl, de
@@ -375,29 +333,13 @@ parseInstruction:
 	; We're within bounds! Now, divide by 2
 	ld	a, l
 	rr	h \ rra
-	; LSB in A, spit
+	; LSB in A
-	call	ioPutB
+	ld	c, a
 	ld	a, h
 	and	0xf
-	or	b
-	jp	ioPutB
-
-.spitINOUT:
-	; Rd in H, A in L
-	ld	a, h
-	call	.placeRd
-	ld	a, l
-	and	0xf
-	or	c
-	; LSB ready
-	call	ioPutB
-	; The two high bits of A go in bits 3:1 of MSB
-	ld	a, l
-	rra \ rra \ rra
-	and	0b110
-	or	b
 	ld	b, a
-	jr	.spitMSB
+	jr	.spit
+
 .spit:
 	; LSB is spit *before* MSB
 	ld	a, (ix+2)
@@ -464,12 +406,29 @@ parseInstruction:
 	jr	.spitBR2
 
 ; local routines
-; place number in A in BC at position .......d dddd....
+; place number in H in BC at position .......d dddd....
 ; BC is assumed to be 0
 .placeRd:
-	sla a \ rla \ rla \ rla	; last RLA might set carry
+	sla h \ rl h \ rl h \ rl h	; last RL H might set carry
 	rl	b
+	ld	c, h
+	ret
+
+; place number in L in BC at position ...rrrr. ....rrrr
+; BC is assumed to be either 0 or to be set by .placeRd, that is, that the
+; high 4 bits of C and lowest bit of B will be preserved.
+.placeRr:
+	; let's start with the 4 lower bits
+	ld	a, l
+	and	0x0f
+	or	c
 	ld	c, a
+	ld	a, l
+	; and now those high 4 bits which go in B.
+	and	0xf0
+	rra \ rra \ rra
+	or	b
+	ld	b, a
 	ret
 
 .swapHL:
@@ -491,6 +450,7 @@ parseInstruction:
 ; 'a' - A 5-bit I/O port value
 ; 'A' - A 6-bit I/O port value
 ; 'b' - a 0-7 bit value
+; 'D' - A double-length number which will fill whole HL.
 ; 'R' - an r5 value: r0-r31
 ; 'r' - an r4 value: r16-r31
 ;
@@ -506,6 +466,8 @@ argSpecs:
 	.db	'R', 'b'	; Rd(5) + bit
 	.db	'b', 7		; bit + k(7)
 	.db	'R', 'A'	; Rd(5) + A(6)
+	.db	'D', 0		; K(12)
+	.db	'a', 'b'	; A(5) + bit
 
 ; Parse arguments from I/O according to specs in HL
 ; H for first spec, L for second spec
@@ -515,16 +477,18 @@ argSpecs:
 ; and thus parse their args themselves.
 ; Z for success.
 _parseArgs:
-	; For the duration of the routine, our final value will be in DE, and
+	; For the duration of the routine, argspec is in DE and final MSB is
-	; then placed in HL at the end.
+	; in BC. We place result in HL at the end.
 	push	de
+	push	bc
+	ld	bc, 0
 	ex	de, hl		; argspecs now in DE
 	call	readWord
 	jr	nz, .end
 	ld	a, d
 	call	.parse
 	jr	nz, .end
-	ld	d, a
+	ld	b, a
 	ld	a, e
 	or	a
 	jr	z, .end		; no arg
@@ -536,10 +500,12 @@ _parseArgs:
 	call	.parse
 	jr	nz, .end
 	; we're done with (HL) now
-	ld	l, a
+	ld	c, a
 	cp	a		; ensure Z
 .end:
-	ld	h, d
+	ld	h, b
+	ld	l, c
+	pop	bc
 	pop	de
 	ret
 
@@ -554,42 +520,43 @@ _parseArgs:
 	jr	z, _readBit
 	cp	'A'
 	jr	z, _readA6
+	cp	'a'
+	jr	z, _readA5
 	cp	7
 	jr	z, _readk7
 	cp	8
 	jr	z, _readK8
+	cp	'D'
+	jr	z, _readDouble
 	ret			; something's wrong
 
-; Read expr and return success only if result in under number given in A
-; Z for success
-_readExpr:
-	push	ix
-	push	bc
-	ld	b, a
-	call	parseExpr
-	jr	nz, .end
-	ld	a, b
-	call	_IX2A
-	jr	nz, .end
-	or	c
-	ld	c, a
-	cp	a		; ensure Z
-.end:
-	pop	bc
-	pop	ix
-	ret
-
 _readBit:
 	ld	a, 7
 	jr	_readExpr
 
 _readA6:
 	ld	a, 0x3f
+	jr	_readExpr
+
+_readA5:
+	ld	a, 0x1f
+	jr	_readExpr
 
 _readK8:
 	ld	a, 0xff
 	jr	_readExpr
 
+_readDouble:
+	push	ix
+	call	parseExpr
+	jr	nz, .end
+	push	ix \ pop bc
+	; BC is already set. For good measure, let's set A to BC's MSB
+	ld	a, b
+.end:
+	pop	ix
+	ret
+
 _readk7:
 	push	hl
 	push	de
@@ -611,7 +578,7 @@ _readk7:
 	inc	hl \ inc hl
 	ex	de, hl
 	sbc	hl, de
-	jp	c, .err	; Carry? error
+	jr	c, .err	; Carry? error
 	ld	de, 0x7f
 	sbc	hl, de
 	; We're within bounds! However, our value in L is the number of
@@ -667,4 +634,23 @@ _IX2A:
 	; Z set from "or a"
 	ret
 
+; Read expr and return success only if result in under number given in A
+; Z for success
+_readExpr:
+	push	ix
+	push	bc
+	ld	b, a
+	call	parseExpr
+	jr	nz, .end
+	ld	a, b
+	call	_IX2A
+	jr	nz, .end
+	or	c
+	ld	c, a
+	cp	a		; ensure Z
+.end:
+	pop	bc
+	pop	ix
+	ret
+
 

tools/tests/avra/blink_tn45.asm

@@ -14,8 +14,8 @@ main:
         ldi	r16, RAMEND}8
 	out	SPH, r16
 
-        ;sbi     DDRB, 0
+        sbi     DDRB, 0
-        ;cbi     PORTB, 0
+        cbi     PORTB, 0
 
 	; To have a blinking delay that's visible, we have to prescale a lot.
 	; The maximum prescaler is 1024, which makes our TCNT0 increase
@@ -37,7 +37,7 @@ toggle:
 	ldi	r16, 0b00000010	; TOV0
 	out	TIFR, R16
 	inc	r1
-        ;cbi     PORTB, 0
+        cbi     PORTB, 0
         sbrs    r1, 1		; if LED is on
-        ;sbi     PORTB, 0
+        sbi     PORTB, 0
 	ret

tools/tests/avra/blink_tn45.expected

@@ -1 +1 @@
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