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177e70580f
...
2e23b84fc1
4
blk/661
4
blk/661
@ -1,10 +1,8 @@
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VARIABLE ORG
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VARIABLE L1 VARIABLE L2 VARIABLE L3 VARIABLE L4
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: SPLITB
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256 /MOD SWAP
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;
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( We divide by 2 because each PC represents a word. )
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: PC H@ ORG @ - 1 RSHIFT ;
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: PC H@ ORG @ ;
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( A, spits an assembled byte, A,, spits an assembled word
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Both increase PC. To debug, change C, to .X )
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: A, C, ; : A,, SPLITB A, A, ;
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18
blk/662
18
blk/662
@ -1,7 +1,11 @@
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: _oor ." arg out of range: " .X SPC ." PC: " PC .X NL ABORT ;
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: _r8c DUP 7 > IF _oor THEN ;
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: _r32c DUP 31 > IF _oor THEN ;
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: _r16+c _r32c DUP 16 < IF _oor THEN ;
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: _r256c DUP 255 > IF _oor THEN ;
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: _Rdp ( op rd -- op', place Rd ) 4 LSHIFT OR ;
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( 0000 000d dddd 0000 )
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: _Rdp ( op rd -- op' place Rd ) 4 LSHIFT OR ;
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: OPRd CREATE , DOES> @ SWAP _Rdp A,, ;
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0b1001010000000101 OPRd ASR, 0b1001010000000000 OPRd COM,
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0b1001010000001010 OPRd DEC, 0b1001010000000011 OPRd INC,
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0b1001001000000110 OPRd LAC, 0b1001001000000101 OPRd LAS,
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0b1001001000000111 OPRd LAT,
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0b1001010000000110 OPRd LSR, 0b1001010000000001 OPRd NEG,
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0b1001000000001111 OPRd POP, 0b1001001000001111 OPRd PUSH,
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0b1001010000000111 OPRd ROR, 0b1001010000000010 OPRd SWAP,
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0b1001001000000100 OPRd XCH,
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19
blk/663
19
blk/663
@ -1,10 +1,9 @@
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( 0000 000d dddd 0000 )
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: OPRd CREATE , DOES> @ SWAP _r32c _Rdp A,, ;
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0b1001010000000101 OPRd ASR, 0b1001010000000000 OPRd COM,
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0b1001010000001010 OPRd DEC, 0b1001010000000011 OPRd INC,
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0b1001001000000110 OPRd LAC, 0b1001001000000101 OPRd LAS,
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0b1001001000000111 OPRd LAT,
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0b1001010000000110 OPRd LSR, 0b1001010000000001 OPRd NEG,
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0b1001000000001111 OPRd POP, 0b1001001000001111 OPRd PUSH,
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0b1001010000000111 OPRd ROR, 0b1001010000000010 OPRd SWAP,
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0b1001001000000100 OPRd XCH,
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( 0000 00rd dddd rrrr )
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: OPRdRr CREATE C, DOES> C@ ( rd rr op )
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OVER 0x10 AND 3 RSHIFT OR ( rd rr op' )
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8 LSHIFT OR 0xff0f AND ( rd op' )
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SWAP _Rdp A,, ;
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0x1c OPRdRr ADC, 0x0c OPRdRr ADD, 0x20 OPRdRr AND,
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0x14 OPRdRr CP, 0x04 OPRdRr CPC, 0x10 OPRdRr CPSE,
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0x24 OPRdRr EOR, 0x2c OPRdRr MOV, 0x9c OPRdRr MUL,
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0x28 OPRdRr OR, 0x08 OPRdRr SBC, 0x18 OPRdRr SUB,
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22
blk/664
22
blk/664
@ -1,9 +1,13 @@
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( 0000 00rd dddd rrrr )
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: OPRdRr CREATE C, DOES> C@ ( rd rr op )
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OVER _r32c 0x10 AND 3 RSHIFT OR ( rd rr op' )
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8 LSHIFT OR 0xff0f AND ( rd op' )
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SWAP _r32c _Rdp A,, ;
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0x1c OPRdRr ADC, 0x0c OPRdRr ADD, 0x20 OPRdRr AND,
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0x14 OPRdRr CP, 0x04 OPRdRr CPC, 0x10 OPRdRr CPSE,
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0x24 OPRdRr EOR, 0x2c OPRdRr MOV, 0x9c OPRdRr MUL,
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0x28 OPRdRr OR, 0x08 OPRdRr SBC, 0x18 OPRdRr SUB,
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( 0000 KKKK dddd KKKK )
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: OPRdK CREATE C, DOES> C@ ( rd K op )
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OVER 0xf0 AND 4 RSHIFT OR ( rd K op' )
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ROT 5 LSHIFT ROT 0x0f AND OR ( op' rdK ) A, A, ;
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0x70 OPRdK ANDI, 0x30 OPRdK CPI, 0x0e OPRdK LDI,
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0x60 OPRdK ORI, 0x40 OPRdK SBCI, 0x60 OPRdK SBR,
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0x50 OPRdK SUBI,
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( 0000 0000 AAAA Abbb )
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: OPAb CREATE C, DOES> C@ ( A b op )
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ROT 3 LSHIFT ROT OR A, A, ;
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0x98 OPAb CBI, 0x9a OPAb SBI, 0x99 OPAb SBIC,
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0x9b OPAb SBIS,
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22
blk/665
22
blk/665
@ -1,13 +1,11 @@
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( 0000 KKKK dddd KKKK )
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: OPRdK CREATE C, DOES> C@ ( rd K op )
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OVER _r256c 0xf0 AND 4 RSHIFT OR ( rd K op' )
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ROT _r16+c 4 LSHIFT ROT 0x0f AND OR ( op' rdK ) A, A, ;
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0x70 OPRdK ANDI, 0x30 OPRdK CPI, 0xe0 OPRdK LDI,
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0x60 OPRdK ORI, 0x40 OPRdK SBCI, 0x60 OPRdK SBR,
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0x50 OPRdK SUBI,
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: OPNA CREATE , DOES> @ A,, ;
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0x9598 OPNA BREAK, 0x9488 OPNA CLC, 0x94d8 OPNA CLH,
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0x94f8 OPNA CLI, 0x94a8 OPNA CLN, 0x94c8 OPNA CLS,
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0x94e8 OPNA CLT, 0x94b8 OPNA CLV, 0x9498 OPNA CLZ,
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0x9419 OPNA EIJMP, 0x9509 OPNA ICALL, 0x9519 OPNA EICALL,
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0x9409 OPNA IJMP, 0x0000 OPNA NOP, 0x9508 OPNA RET,
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0x9518 OPNA RETI, 0x9408 OPNA SEC, 0x9458 OPNA SEH,
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0x9478 OPNA SEI, 0x9428 OPNA SEN, 0x9448 OPNA SES,
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0x9468 OPNA SET, 0x9438 OPNA SEV, 0x9418 OPNA SEZ,
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0x9588 OPNA SLEEP, 0x95a8 OPNA WDR,
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( 0000 0000 AAAA Abbb )
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: OPAb CREATE C, DOES> C@ ( A b op )
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ROT _r32c 3 LSHIFT ROT _r8c OR A, A, ;
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0x98 OPAb CBI, 0x9a OPAb SBI, 0x99 OPAb SBIC,
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0x9b OPAb SBIS,
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11
blk/666
11
blk/666
@ -1,11 +0,0 @@
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: OPNA CREATE , DOES> @ A,, ;
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0x9598 OPNA BREAK, 0x9488 OPNA CLC, 0x94d8 OPNA CLH,
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0x94f8 OPNA CLI, 0x94a8 OPNA CLN, 0x94c8 OPNA CLS,
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0x94e8 OPNA CLT, 0x94b8 OPNA CLV, 0x9498 OPNA CLZ,
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0x9419 OPNA EIJMP, 0x9509 OPNA ICALL, 0x9519 OPNA EICALL,
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0x9409 OPNA IJMP, 0x0000 OPNA NOP, 0x9508 OPNA RET,
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0x9518 OPNA RETI, 0x9408 OPNA SEC, 0x9458 OPNA SEH,
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0x9478 OPNA SEI, 0x9428 OPNA SEN, 0x9448 OPNA SES,
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0x9468 OPNA SET, 0x9438 OPNA SEV, 0x9418 OPNA SEZ,
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0x9588 OPNA SLEEP, 0x95a8 OPNA WDR,
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10
blk/667
10
blk/667
@ -1,10 +0,0 @@
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( 0000 0000 0sss 0000 )
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: OPb CREATE , DOES> @ ( b op )
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SWAP _r8c _Rdp A,, ;
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0b1001010010001000 OPb BCLR, 0b1001010000001000 OPb BSET,
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( 0000 000d dddd 0bbb )
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: OPRdb CREATE , DOES> @ ( rd b op )
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ROT _r32c _Rdp SWAP _r8c OR A,, ;
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0b1111100000000000 OPRdb BLD, 0b1111101000000000 OPRdb BST,
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0b1111110000000000 OPRdb SBRC, 0b1111111000000000 OPRdb SBRS,
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8
blk/668
8
blk/668
@ -1,8 +0,0 @@
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( a -- k12, absolute addr a, relative to PC in a k12 addr )
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: _r7ffc DUP 0x7ff > IF _oor THEN ;
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: _raddr12
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PC - DUP 0< IF 0x800 + _r7ffc 0x800 OR ELSE _r7ffc THEN ;
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0xc0 CONSTANT RJMPOP
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0xd0 CONSTANT RCALLOP
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: RJMP, _raddr12 RJMPOP 8 LSHIFT OR A,, ;
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: RCALL, _raddr12 RCALLOP 8 LSHIFT OR A,, ;
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10
blk/669
10
blk/669
@ -1,10 +0,0 @@
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( ex: L1 LBL! .. L1 @ RJMP, )
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: LBL! ( l -- ) PC SWAP ! ;
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( ex: L1 FLBL, .. RJMPOP L1 FLBL! )
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: FLBL, ( l -- ) LBL! 0 A,, ;
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: FLBL! ( op l -- )
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@ DUP PC -^ 1- ( op l off )
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ROT 8 LSHIFT OR ( l op' )
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( warning: l is a PC offset, not a mem addr! )
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SWAP 2 * ORG @ + ( op' addr ) ! ;
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@ -1,2 +1,2 @@
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#!/bin/sh
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echo -e "660 LOAD H@ ORG !\n$(cat -)\nORG @ 256 /MOD 2 PC! 2 PC! H@ 256 /MOD 2 PC! 2 PC! " | ./stage
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echo -e "660 LOAD H@ 256 /MOD 2 PC! 2 PC! \n$(cat -)\nH@ 256 /MOD 2 PC! 2 PC! " | ./stage
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@ -1,9 +1,13 @@
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PROGNAME = ps2ctl
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AVRDUDEMCU ?= t45
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AVRDUDEARGS ?= -c usbtiny -P usb
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TARGETS = $(PROGNAME).bin
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TARGETS = $(PROGNAME).bin os.sms
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BASEDIR = ../../..
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EDIR = $(BASEDIR)/emul
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ZASM = $(BASEDIR)/emul/zasm/zasm
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KERNEL = $(BASEDIR)/kernel
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APPS = $(BASEDIR)/apps
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AVRA = $(BASEDIR)/emul/zasm/avra
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AVRINC = $(BASEDIR)/avr
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# Rules
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@ -15,8 +19,11 @@ all: $(TARGETS)
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send: $(PROGNAME).bin
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avrdude $(AVRDUDEARGS) -p $(AVRDUDEMCU) -U flash:w:$(PROGNAME).bin
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$(PROGNAME).bin: $(PROGNAME).fs
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cd $(EDIR) && ./avra.sh < ../recipes/sms/kbd/$(PROGNAME).fs > ../recipes/sms/kbd/$@
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$(PROGNAME).bin: $(PROGNAME).asm
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$(AVRA) $(AVRINC) < $(PROGNAME).asm > $@
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os.sms: glue.asm
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$(ZASM) $(KERNEL) $(APPS) < glue.asm > $@
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clean:
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rm -f $(TARGETS)
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@ -1,53 +0,0 @@
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( Receives keystrokes from PS/2 keyboard and send them to the
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'164. On the PS/2 side, it works the same way as the controller
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in the rc2014/ps2 recipe. However, in this case, what we have
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on the other side isn't a z80 bus, it's the one of the two
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controller ports of the SMS through a DB9 connector.
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The PS/2 related code is copied from rc2014/ps2 without much
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change. The only differences are that it pushes its data to a
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'164 instead of a '595 and that it synchronizes with the SMS
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with a SR latch, so we don't need PCINT. We can also afford to
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run at 1MHz instead of 8.
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*** Register Usage ***
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GPIOR0 flags:
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0 - when set, indicates that the DATA pin was high when we
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received a bit through INT0. When we receive a bit, we set
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flag T to indicate it.
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R16: tmp stuff
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R17: recv buffer. Whenever we receive a bit, we push it in
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there.
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R18: recv step:
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- 0: idle
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- 1: receiving data
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- 2: awaiting parity bit
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- 3: awaiting stop bit
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R19: Register used for parity computations and tmp value in
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some other places
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R20: data being sent to the '164
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Y: pointer to the memory location where the next scan code from
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ps/2 will be written.
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Z: pointer to the next scan code to push to the 595 )
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0x015f CONSTANT RAMEND
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0x11 CONSTANT GPIOR0
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0x16 CONSTANT PINB
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1 CONSTANT DATA
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H@ ORG !
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L1 FLBL, ( main )
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L2 FLBL, ( hdlINT0 )
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( Read DATA and set GPIOR0/0 if high. Then, set flag T.
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no SREG fiddling because no SREG-modifying instruction )
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RJMPOP L2 FLBL! ( hdlINT0 )
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PINB DATA SBIC,
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GPIOR0 0 SBI,
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SET,
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RETI,
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RJMPOP L1 FLBL! ( main )
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16 RAMEND 0xff AND LDI,
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