sms/kbd: begin rewriting ps2ctl to Forth

So far, the resulting binary matches.

blk/665

@@ -2,7 +2,7 @@
 : OPRdK CREATE C, DOES> C@ ( rd K op )
     OVER _r256c 0xf0 AND 4 RSHIFT OR ( rd K op' )
     ROT _r16+c 4 LSHIFT ROT 0x0f AND OR ( op' rdK ) A, A, ;
-0x70 OPRdK ANDI,   0x30 OPRdK CPI,     0x0e OPRdK LDI,
+0x70 OPRdK ANDI,   0x30 OPRdK CPI,     0xe0 OPRdK LDI,
 0x60 OPRdK ORI,    0x40 OPRdK SBCI,    0x60 OPRdK SBR,
 0x50 OPRdK SUBI,
 

emul/avra.sh

@@ -1,2 +1,2 @@
 #!/bin/sh
-echo -e "660 LOAD H@ 256 /MOD 2 PC! 2 PC! \n$(cat -)\nH@ 256 /MOD 2 PC! 2 PC! " | ./stage
+echo -e "660 LOAD H@ ORG !\n$(cat -)\nORG @ 256 /MOD 2 PC! 2 PC! H@ 256 /MOD 2 PC! 2 PC! " | ./stage

recipes/sms/kbd/Makefile

@@ -1,13 +1,9 @@
 PROGNAME = ps2ctl
 AVRDUDEMCU ?= t45
 AVRDUDEARGS ?= -c usbtiny -P usb 
-TARGETS = $(PROGNAME).bin os.sms
+TARGETS = $(PROGNAME).bin
 BASEDIR = ../../..
-ZASM = $(BASEDIR)/emul/zasm/zasm
-KERNEL = $(BASEDIR)/kernel
-APPS = $(BASEDIR)/apps
-AVRA = $(BASEDIR)/emul/zasm/avra
-AVRINC = $(BASEDIR)/avr
+EDIR = $(BASEDIR)/emul
 
 # Rules
 
@@ -19,11 +15,8 @@ all: $(TARGETS)
 send: $(PROGNAME).bin
 	avrdude $(AVRDUDEARGS) -p $(AVRDUDEMCU) -U flash:w:$(PROGNAME).bin
 
-$(PROGNAME).bin: $(PROGNAME).asm
-	$(AVRA) $(AVRINC) < $(PROGNAME).asm > $@
-
-os.sms: glue.asm
-	$(ZASM) $(KERNEL) $(APPS) < glue.asm > $@
+$(PROGNAME).bin: $(PROGNAME).fs
+	cd $(EDIR) && ./avra.sh < ../recipes/sms/kbd/$(PROGNAME).fs > ../recipes/sms/kbd/$@
 
 clean:
 	rm -f $(TARGETS)

recipes/sms/kbd/ps2ctl.fs

@@ -0,0 +1,53 @@
+( Receives keystrokes from PS/2 keyboard and send them to the
+'164. On the PS/2 side, it works the same way as the controller
+in the rc2014/ps2 recipe.  However, in this case, what we have
+on the other side isn't a z80 bus, it's the one of the two
+controller ports of the SMS through a DB9 connector.
+
+The PS/2 related code is copied from rc2014/ps2 without much
+change. The only differences are that it pushes its data to a
+'164 instead of a '595 and that it synchronizes with the SMS
+with a SR latch, so we don't need PCINT. We can also afford to
+run at 1MHz instead of 8.
+
+*** Register Usage ***
+
+GPIOR0 flags:
+0 - when set, indicates that the DATA pin was high when we
+    received a bit through INT0. When we receive a bit, we set
+    flag T to indicate it.
+
+R16: tmp stuff
+R17: recv buffer. Whenever we receive a bit, we push it in
+     there.
+R18: recv step:
+     - 0: idle
+     - 1: receiving data
+     - 2: awaiting parity bit
+     - 3: awaiting stop bit
+R19: Register used for parity computations and tmp value in
+     some other places
+R20: data being sent to the '164
+Y: pointer to the memory location where the next scan code from
+   ps/2 will be written.
+Z: pointer to the next scan code to push to the 595 )
+
+0x015f CONSTANT RAMEND
+0x11 CONSTANT GPIOR0
+0x16 CONSTANT PINB
+1 CONSTANT DATA
+
+H@ ORG !
+L1 FLBL, ( main )
+L2 FLBL, ( hdlINT0 )
+
+( Read DATA and set GPIOR0/0 if high. Then, set flag T.
+  no SREG fiddling because no SREG-modifying instruction )
+RJMPOP L2 FLBL! ( hdlINT0 )
+PINB DATA SBIC,
+GPIOR0 0 SBI,
+SET,
+RETI,
+
+RJMPOP L1 FLBL! ( main )
+16 RAMEND 0xff AND LDI,