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collapseos/arch/z80/trs80/xcomp.fs

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By default, allocate about 0x100 bytes for PSP+RSP During "make updatebootstrap", we use less than 0x20 bytes on the PSP side and less than 0x40 bytes on the RSP one. 0x100 bytes ought to be enough for anybody.
2020-05-15 08:41:09 +10:00
0xff00 CONSTANT RS_ADDR
Replace INITIAL_SP with PS_ADDR conf Now I struggle to remember why I ever did things they way I did. There must have been a reason...
2020-05-12 11:08:24 +10:00
0xfffa CONSTANT PS_ADDR
Rename RAMSTART to SYSVARS It's more descriptive this way. Also, I'll soon add a new HERESTART config.
2020-06-29 08:49:30 +10:00
RS_ADDR 0x80 - CONSTANT SYSVARS
Add HERESTART xcomp config
2020-06-29 09:45:28 +10:00
0 CONSTANT HERESTART
Move z80a from B200 to B5 The idea is to consider assemblers as "runtime" apps instead of placing them in the "bootstrap" section of the blocks. These apps will be used for much more than bootstrapping. Moved its documentation to doc/asm.txt and made its code blocks more compact.
2020-09-22 07:51:08 +10:00
5 LOAD ( z80 assembler )
z80: make boot binary a 2-part process Previously, recipes that began spitting binary contents before loading block 282 would end up with VARIABLE code in their binary, thus breaking them. We fix this by making this loading process 2-part.
2020-06-27 11:41:17 +10:00
262 LOAD ( xcomp )
282 LOAD ( boot.z80.decl )
270 LOAD ( xcomp overrides )
recipes/trs80: wip
2020-04-28 21:51:41 +10:00
0x3000 BIN( !
z80: make boot binary a 2-part process Previously, recipes that began spitting binary contents before loading block 282 would end up with VARIABLE code in their binary, thus breaking them. We fix this by making this loading process 2-part.
2020-06-27 11:41:17 +10:00
283 335 LOADR ( boot.z80 )
353 LOAD ( xcomp core low )
recipes/trs80: move recipe blocks into local overlay
2020-09-21 01:57:04 +10:00
602 LOAD ( trs80 )
Move most of the high layer of comp core into the low one With KEY and EMIT being switch words, most of the high layer can be defined before drivers. In addition to this change, I've compacted core blocks which were becoming quite sparse.
2020-10-29 09:06:58 +11:00
390 LOAD ( xcomp core high )
recipes/trs80: wip
2020-04-28 21:51:41 +10:00
(entry) _
( Update LATEST )
xcomp: remove XOFF and use ORG and BIN( instead
2020-04-28 23:15:17 +10:00
PC ORG @ 8 + !
Make KEY and EMIT into switch words
2020-10-29 07:00:58 +11:00
( TRS-80 wants CR-only newlines )
Add BS, CR, LF, SPC ASCII consts Previously, these words would be ascii emitters, but seldom used except for the SPC emitter. However, I would often end up hardcoding these constants. With useless emitters removed and ASCII constants added, we have a more usable system. Also, fix broken test harness.
2021-01-03 02:19:42 +11:00
," CR 0x50 RAM+ C! BLK$ FD$ " EOT,
Add words |M and |L Splitting a word into MSB/LSB pairs happens often and is worth, I think, native words. Also, I'm going to need it in the upcoming commits.
2020-12-08 12:08:45 +11:00
ORG @ |M 2 PC! 2 PC!
H@ |M 2 PC! 2 PC!