collapseos/blk/596

CODE (spix) ( n -- n )
    HL POP,
    chkPS,
    A L LDrr,
    SPI_DATA OUTiA,
    SPI_DELAY
    SPI_DATA INAi,
    L A LDrr,
    HL PUSH,
;CODE
CODE (spie) SPI_CSLOW OUTiA, ;CODE
CODE (spid) SPI_CSHIGH OUTiA, ;CODE
rc2014: separate SPI relay and SDC drivers My intention is to reuse the SPI relay to program AVR MCUs from a RC2014. 2020-06-30 08:48:00 +10:00			`CODE (spix) ( n -- n )`
			`HL POP,`
			`chkPS,`
			`A L LDrr,`
			`SPI_DATA OUTiA,`
spi: add SPI_DELAY decl AVR chips often run at less than z80's system clock. This means that our SPI relay needs to have its own clock to properly communicate with it. This means that the delay between OUT and IN can't be hardcoded to 2 NOPs anymore. It needs to be configurable. 2020-08-23 21:55:17 +10:00			`SPI_DELAY`
rc2014: separate SPI relay and SDC drivers My intention is to reuse the SPI relay to program AVR MCUs from a RC2014. 2020-06-30 08:48:00 +10:00			`SPI_DATA INAi,`
			`L A LDrr,`
			`HL PUSH,`
			`;CODE`
			`CODE (spie) SPI_CSLOW OUTiA, ;CODE`
			`CODE (spid) SPI_CSHIGH OUTiA, ;CODE`