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In the beginning of Collapse OS' Forth version, the readline sub- system was optional. This is why we had this separate RDLN$ routine and that the input buffer was allocated at boot time. It's been a while since the RDLN system has been made mandatory, but we still paid the complexity tax of this separation. Not anymore.
80 lines
2.9 KiB
Plaintext
80 lines
2.9 KiB
Plaintext
# Interfacing a PS/2 keyboard
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Collapse OS needs a way to input commands and keyboards are one
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of the most straightforward ways to proceed. The PS/2 protocol
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is very widespread and relatively simple.
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We explain here how to interface a PS/2 keyboard with a RC2014.
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# Gathering parts
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* A RC2014 Classic that could install the base recipe
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* A PS/2 keyboard. A USB keyboard + adapter also works, if it's
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not too recent (if it still speaks PS/2).
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* A PS/2 female connector.
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* ATtiny85/45/25 (main MCU for the device)
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* 74xx595 (shift register)
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* 40106 inverter gates
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* Diodes for A*, IORQ, RO.
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* Proto board, RC2014 header pins, wires, IC sockets, etc.
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* AVRA (https://github.com/hsoft/avra). The code for this recipe
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hasn't been translated to Collapse OS' AVR assembler yet.
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# Building the PS/2 interface
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Let's start with the PS/2 connector (see img/ps2-conn.png),
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which has two pins.
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Both are connected to the ATtiny45, CLK being on PB2 to have
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INT0 on it.
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The DATA line is multi-use. That is, PB1 is connected both to
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the PS/2 data line and to the 595's SER. This saves us a
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precious pin.
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The ATtiny 45 (img/ps2-t45.png) hooks everything together. CE
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comes from the z80 bus (img/ps2-z80.png).
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The 595 (img/ps2-595.png) allows us to supply the z80 bus with
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data within its 375ns limits. SRCLR is hooked to the CE line so
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that whenever a byte is read, the 595 is zeroed out as fast as
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possible so that the z80 doesn't read "false doubles".
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The 595, to have its SRCLR becoming effective, needs a RCLK
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trigger, which doesn't happen immediately. It's the ATtiny45, in
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its PCINT interrupt, that takes care of doing that trigger (as
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fast as possible).
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Our device is read only, on one port. That makes the "Chip
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Enable" (CE) selection rather simple. In my design, I chose the
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IO port 8, so I inverted A3. I chose a 40106 inverter to do
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that, do as you please for your own design.
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I wanted to hook CE to a flip flop so that the MCU could relax a
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bit more w.r.t. reacting to its PB4 pin changes, but I didn't
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have NAND gates that are fast enough in stock, so I went with
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this design. But otherwise, I would probably have gone the
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flip-flop way. Seems more solid.
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Then, all you need to do is to assemble code/ps2ctl.asm and load
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it onto your ATtiny.
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# Using the PS/2 interface
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To use this interface, you have to build a new Collapse OS
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binary. This binary needs two things.
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First, we need a "(ps2kc)" routine (see doc/protocol.txt). In
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this case, it's easy, it's ": (ps2kc) 8 PC@ ;". Then, we can
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load PS/2 subsystem. You add "411 414 LOADR". Then, at
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initialization, you add "PS2$". You also need to define PS2_MEM
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at the top. You can probably use "SYSVARS + 0xaa".
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The PS/2 subsystem provides "(key)" from "(ps2kc)".
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For debugging purposes, you might not want to go straight to
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plugging PS/2 "(key)" into the system. What I did myself was to
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load the PS/2 subsystem *before* ACIA (which overrides with its
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own "(key)") and added a dummy word in between to access PS/2's
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key.
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