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b745f49186
The goal is to avoid mixing those routines with "character devices" (acia, vpd, kbd) which aren't block devices and have routines that have different expectations. This is a first step to fixing #64.
79 lines
1.4 KiB
NASM
79 lines
1.4 KiB
NASM
; *** Consts ***
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; Memory address where the AT28 is configured to start
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.equ AT28W_MEMSTART 0x2000
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; Value mismatch during validation
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.equ AT28W_ERR_MISMATCH 0x10
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; *** Variables ***
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.equ AT28W_MAXBYTES AT28W_RAMSTART
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.equ AT28W_RAMEND @+2
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; *** Code ***
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at28wMain:
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ld de, .argspecs
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ld ix, AT28W_MAXBYTES
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call parseArgs
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jr z, at28wInner
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; bad args
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ld a, SHELL_ERR_BAD_ARGS
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ret
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.argspecs:
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.db 0b111, 0b101, 0
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at28wInner:
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; Reminder: words in parseArgs aren't little endian. High byte is first.
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ld a, (AT28W_MAXBYTES)
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ld b, a
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ld a, (AT28W_MAXBYTES+1)
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ld c, a
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ld hl, AT28W_MEMSTART
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call at28wBCZero
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jr nz, .loop
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; BC is zero, default to 0x2000 (8k, the size of the AT28)
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ld bc, 0x2000
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.loop:
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call blkGetB
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jr nz, .loopend
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ld (hl), a
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ld e, a ; save expected data for verification
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; initiate polling
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ld a, (hl)
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ld d, a
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.wait:
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; as long as writing operation is running, IO/6 will toggle at each
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; read attempt. We know that write is finished when we read the same
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; value twice.
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ld a, (hl)
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cp d
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jr z, .waitend
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ld d, a
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jr .wait
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.waitend:
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; same value was read twice. A contains our final value for this memory
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; address. Let's compare with what we're written.
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cp e
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jr nz, .mismatch
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inc hl
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dec bc
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call at28wBCZero
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jr nz, .loop
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.loopend:
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; We're finished. Success!
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xor a
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ret
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.mismatch:
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ld a, AT28W_ERR_MISMATCH
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ret
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at28wBCZero:
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xor a
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cp b
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ret nz
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cp c
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ret
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