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60 lines
1.1 KiB
Z80 Assembly
60 lines
1.1 KiB
Z80 Assembly
( Save ACIA conf )
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ACIA_CTL
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: ACIA_CTL [ LITN ] ;
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ACIA_IO
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: ACIA_IO [ LITN ] ;
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ACIA_MEM
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: ACIA_MEM [ LITN ] ;
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( Memory layout
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+0 ACIAR>
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+2 ACIAW>
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+4 ACIA(
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+6 ACIA)
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)
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(xentry) ~ACIA
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AF PUSHqq,
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HL PUSHqq,
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DE PUSHqq,
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( Read our character from ACIA into our BUFIDX )
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ACIA_CTL INAn,
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0x01 ANDn, ( is ACIA rcv buf full? )
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JRZ, L2 FWR ( end, no, wrong interrupt cause. )
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( +2 == ACIAW> )
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ACIA_MEM 2 + LDHL(nn),
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( is it == to ACIAR>? )
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( +0 == ACIAR> )
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DE ACIA_MEM LDdd(nn),
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( carry cleared from ANDn above )
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DE SBCHLss,
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JRZ, L3 FWR ( end, buffer full )
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DE ADDHLss, ( restore ACIAW> )
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( buffer not full, let's write )
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ACIA_IO INAn,
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(HL) A LDrr,
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( advance W> )
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HL INCss,
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( +2 == ACIAW> )
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ACIA_MEM 2 + LD(nn)HL,
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( +6 == ACIA) )
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DE ACIA_MEM 6 + LDdd(nn),
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DE SUBHLss,
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JRNZ, L4 FWR ( skip )
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( end of buffer reached )
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( +4 == ACIA( )
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ACIA_MEM 4 + LDHL(nn),
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( +2 == ACIAW> )
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ACIA_MEM 2 + LD(nn)HL,
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L4 FSET ( skip )
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L3 FSET L2 FSET ( end )
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DE POPqq,
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HL POPqq,
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AF POPqq,
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EI,
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RETI,
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