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c968995ec0
...
2652c81519
@ -36,49 +36,54 @@ instrNames:
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.db "ADC", 0
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.db "ADD", 0
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.db "AND", 0
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.db "ASR", 0
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.db "CLR", 0
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.db "CP", 0
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.db "CPC", 0
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.db "CPSE", 0
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.db "EOR", 0
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.db "MOV", 0
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.db "MUL", 0
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.db "OR", 0
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.db "SBC", 0
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.db "SUB", 0
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.equ I_ANDI 31
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.db "ANDI", 0
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.db "CPI", 0
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.db "LDI", 0
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.db "ORI", 0
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.db "SBCI", 0
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.db "SBR", 0
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.db "SUBI", 0
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.equ I_BLD 38
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.db "BLD", 0
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.db "BREAK", 0
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.db "BST", 0
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.db "SBRC", 0
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.db "SBRS", 0
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.equ I_RCALL 42
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.db "RCALL", 0
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.db "RJMP", 0
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.equ I_IN 44
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.db "IN", 0
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.equ I_OUT 45
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.db "OUT", 0
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; no arg (from here, instrTbl16)
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.equ I_BREAK 46
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.db "BREAK", 0
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.db "CLC", 0
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.db "CLH", 0
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.db "CLI", 0
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.db "CLN", 0
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.db "CLR", 0
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.db "CLS", 0
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.db "CLT", 0
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.db "CLV", 0
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.db "CLZ", 0
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.db "COM", 0
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.db "CP", 0
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.db "CPC", 0
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.db "CPSE", 0
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.db "DEC", 0
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.db "EICALL", 0
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.db "EIJMP", 0
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.db "EOR", 0
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.db "ICALL", 0
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.db "IJMP", 0
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.db "IN", 0
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.db "INC", 0
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.db "LAC", 0
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.db "LAS", 0
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.db "LAT", 0
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.db "LSR", 0
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.db "MOV", 0
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.db "MUL", 0
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.db "NEG", 0
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.db "NOP", 0
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.db "OR", 0
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.db "OUT", 0
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.db "POP", 0
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.db "PUSH", 0
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.db "RET", 0
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.db "RETI", 0
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.db "ROR", 0
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.db "SBC", 0
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.db "SBRC", 0
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.db "SBRS", 0
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.db "SEC", 0
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.db "SEH", 0
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.db "SEI", 0
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@ -88,24 +93,23 @@ instrNames:
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.db "SEV", 0
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.db "SEZ", 0
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.db "SLEEP", 0
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.db "SUB", 0
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.db "SWAP", 0
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.db "WDR", 0
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; Rd(5)
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.equ I_ASR 72
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.db "ASR", 0
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.db "COM", 0
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.db "DEC", 0
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.db "INC", 0
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.db "LAC", 0
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.db "LAS", 0
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.db "LAT", 0
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.db "LSR", 0
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.db "NEG", 0
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.db "POP", 0
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.db "PUSH", 0
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.db "ROR", 0
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.db "SWAP", 0
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.db "XCH", 0
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.equ I_ANDI 77
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.db "ANDI", 0
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.db "CPI", 0
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.db "LDI", 0
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.db "ORI", 0
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.db "SBCI", 0
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.db "SBR", 0
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.db "SUBI", 0
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.equ I_RCALL 84
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.db "RCALL", 0
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.db "RJMP", 0
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.equ I_CBI 86
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.db "CBI", 0
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.db "SBI", 0
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.db 0xff
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; Instruction table
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@ -130,55 +134,57 @@ instrNames:
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; In the same order as in instrNames
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instrTbl:
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; Regular processing: Rd with second arg having its 4 low bits placed in C's
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; 3:0 bits and the 4 high bits being place in B's 4:1 bits
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; No args are also there.
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.db 0x02, 0b00011100, 0x00 ; ADC Rd, Rr
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.db 0x02, 0b00001100, 0x00 ; ADD Rd, Rr
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.db 0x02, 0b00100000, 0x00 ; AND Rd, Rr
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.db 0x01, 0b10010100, 0b00000101 ; ASR Rd
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.db 0x05, 0b11111000, 0x00 ; BLD Rd, b
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; Rd(5) + Rd(5): XXXXXXrd ddddrrrr
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.db 0x02, 0b00011100, 0x00 ; ADC
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.db 0x02, 0b00001100, 0x00 ; ADD
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.db 0x02, 0b00100000, 0x00 ; AND
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.db 0x41, 0b00100100, 0x00 ; CLR (Rr copies Rd)
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.db 0x02, 0b00010100, 0x00 ; CP
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.db 0x02, 0b00000100, 0x00 ; CPC
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.db 0x02, 0b00010000, 0x00 ; CPSE
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.db 0x02, 0b00100100, 0x00 ; EOR
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.db 0x02, 0b00101100, 0x00 ; MOV
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.db 0x02, 0b10011100, 0x00 ; MUL
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.db 0x02, 0b00101000, 0x00 ; OR
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.db 0x02, 0b00001000, 0x00 ; SBC
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.db 0x02, 0b00011000, 0x00 ; SUB
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; Rd(4) + K(8): XXXXKKKK ddddKKKK
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.db 0x04, 0b01110000, 0x00 ; ANDI
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.db 0x04, 0b00110000, 0x00 ; CPI
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.db 0x04, 0b11100000, 0x00 ; LDI
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.db 0x04, 0b01100000, 0x00 ; ORI
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.db 0x04, 0b01000000, 0x00 ; SBCI
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.db 0x04, 0b01100000, 0x00 ; SBR
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.db 0x04, 0b01010000, 0x00 ; SUBI
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; Rd(5) + bit: XXXXXXXd ddddXbbb: lonely bit in LSB is 0 in all cases, so we
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; ignore it.
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.db 0x05, 0b11111000, 0x00 ; BLD
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.db 0x05, 0b11111010, 0x00 ; BST
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.db 0x05, 0b11111100, 0x00 ; SBRC
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.db 0x05, 0b11111110, 0x00 ; SBRS
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; k(12): XXXXkkkk kkkkkkkk
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.db 0x00, 0b11010000, 0x00 ; RCALL
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.db 0x00, 0b11000000, 0x00 ; RJMP
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; IN and OUT
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.db 0x07, 0b10110000, 0x00 ; IN
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.db 0x87, 0b10111000, 0x00 ; OUT (args reversed)
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; no arg
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.db 0x00, 0b10010101, 0b10011000 ; BREAK
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.db 0x05, 0b11111010, 0x00 ; BST Rd, b
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.db 0x00, 0b10010100, 0b10001000 ; CLC
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.db 0x00, 0b10010100, 0b11011000 ; CLH
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.db 0x00, 0b10010100, 0b11111000 ; CLI
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.db 0x00, 0b10010100, 0b10101000 ; CLN
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.db 0x41, 0b00100100, 0x00 ; CLR Rd (Bit 6)
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.db 0x00, 0b10010100, 0b11001000 ; CLS
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.db 0x00, 0b10010100, 0b11101000 ; CLT
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.db 0x00, 0b10010100, 0b10111000 ; CLV
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.db 0x00, 0b10010100, 0b10011000 ; CLZ
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.db 0x01, 0b10010100, 0b00000000 ; COM Rd
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.db 0x02, 0b00010100, 0x00 ; CP Rd, Rr
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.db 0x02, 0b00000100, 0x00 ; CPC Rd, Rr
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.db 0x02, 0b00010000, 0x00 ; CPSE Rd, Rr
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.db 0x01, 0b10010100, 0b00001010 ; DEC Rd
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.db 0x00, 0b10010101, 0b00011001 ; EICALL
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.db 0x00, 0b10010100, 0b00011001 ; EIJMP
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.db 0x02, 0b00100100, 0x00 ; EOR Rd, Rr
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.db 0x00, 0b10010101, 0b00001001 ; ICALL
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.db 0x00, 0b10010100, 0b00001001 ; IJMP
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.db 0x07, 0b10110000, 0x00 ; IN Rd, A
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.db 0x01, 0b10010100, 0b00000011 ; INC Rd
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.db 0x01, 0b10010010, 0b00000110 ; LAC Rd
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.db 0x01, 0b10010010, 0b00000101 ; LAS Rd
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.db 0x01, 0b10010010, 0b00000111 ; LAT Rd
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.db 0x01, 0b10010100, 0b00000110 ; LSR Rd
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.db 0x00, 0b00000000, 0b00000000 ; NOP
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.db 0x02, 0b00101100, 0x00 ; MOV Rd, Rr
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.db 0x02, 0b10011100, 0x00 ; MUL Rd, Rr
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.db 0x01, 0b10010100, 0b00000001 ; NEG Rd
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.db 0x02, 0b00101000, 0x00 ; OR Rd, Rr
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.db 0x87, 0b10111000, 0x00 ; OUT A, Rr (Bit 7)
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.db 0x01, 0b10010000, 0b00001111 ; POP Rd
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.db 0x01, 0b10010010, 0b00001111 ; PUSH Rd
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.db 0x00, 0b10010101, 0b00001000 ; RET
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.db 0x00, 0b10010101, 0b00011000 ; RETI
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.db 0x01, 0b10010100, 0b00000111 ; ROR Rd
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.db 0x02, 0b00001000, 0x00 ; SBC Rd, Rr
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.db 0x05, 0b11111100, 0x00 ; SBRC Rd, b
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.db 0x05, 0b11111110, 0x00 ; SBRS Rd, b
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.db 0x00, 0b10010100, 0b00001000 ; SEC
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.db 0x00, 0b10010100, 0b01011000 ; SEH
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.db 0x00, 0b10010100, 0b01111000 ; SEI
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@ -188,24 +194,22 @@ instrTbl:
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.db 0x00, 0b10010100, 0b00111000 ; SEV
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.db 0x00, 0b10010100, 0b00011000 ; SEZ
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.db 0x00, 0b10010101, 0b10001000 ; SLEEP
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.db 0x02, 0b00011000, 0x00 ; SUB Rd, Rr
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.db 0x01, 0b10010100, 0b00000010 ; SWAP Rd
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.db 0x00, 0b10010101, 0b10101000 ; WDR
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.db 0x01, 0b10010010, 0b00000100 ; XCH Rd
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; Rd(4) + K(8): XXXXKKKK ddddKKKK
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.db 0x04, 0b01110000, 0x00 ; ANDI
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.db 0x04, 0b00110000, 0x00 ; CPI
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.db 0x04, 0b11100000, 0x00 ; LDI
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.db 0x04, 0b01100000, 0x00 ; ORI
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.db 0x04, 0b01000000, 0x00 ; SBCI
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.db 0x04, 0b01100000, 0x00 ; SBR
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.db 0x04, 0b01010000, 0x00 ; SUBI
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; k(12): XXXXkkkk kkkkkkkk
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.db 0x08, 0b11010000, 0x00 ; RCALL k
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.db 0x08, 0b11000000, 0x00 ; RJMP k
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; A(5) + bit: XXXXXXXX AAAAAbbb
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.db 0x09, 0b10011000, 0x00 ; CBI A, b
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.db 0x09, 0b10011010, 0x00 ; SBI A, b
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; Rd(5): XXXXXXXd ddddXXXX
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.db 0x01, 0b10010100, 0b00000101 ; ASR
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.db 0x01, 0b10010100, 0b00000000 ; COM
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.db 0x01, 0b10010100, 0b00001010 ; DEC
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.db 0x01, 0b10010100, 0b00000011 ; INC
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.db 0x01, 0b10010010, 0b00000110 ; LAC
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.db 0x01, 0b10010010, 0b00000101 ; LAS
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.db 0x01, 0b10010010, 0b00000111 ; LAT
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.db 0x01, 0b10010100, 0b00000110 ; LSR
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.db 0x01, 0b10010100, 0b00000001 ; NEG
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.db 0x01, 0b10010000, 0b00001111 ; POP
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.db 0x01, 0b10010010, 0b00001111 ; PUSH
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.db 0x01, 0b10010100, 0b00000111 ; ROR
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.db 0x01, 0b10010100, 0b00000010 ; SWAP
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.db 0x01, 0b10010010, 0b00000100 ; XCH
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; Same signature as getInstID in instr.asm
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; Reads string in (HL) and returns the corresponding ID (I_*) in A. Sets Z if
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@ -267,7 +271,7 @@ parseInstruction:
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push hl \ pop ix ; IX is now our tblrow
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ld hl, 0
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or a
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jr z, .spit ; No arg? spit right away
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jr z, .noarg
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and 0xf ; lower nibble
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dec a ; argspec index is 1-based
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ld hl, argSpecs
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@ -282,6 +286,7 @@ parseInstruction:
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call nz, .swapHL ; Bit 7 set, swap H and L
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call _parseArgs
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ret nz
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.noarg:
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; *** Step 3: place arguments in binary upcode and spit.
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; (IX) is table row
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; Parse arg values now in H and L
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@ -292,32 +297,69 @@ parseInstruction:
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call nz, .cpHintoL ; Bit 6 set, copy H into L
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ld a, e ; InstrID
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cp I_ANDI
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jr c, .spitRegular
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cp I_RCALL
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jr c, .spitRd5Rr5
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cp I_BLD
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jr c, .spitRdK8
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cp I_CBI
|
||||
jr c, .spitk12
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; spit A(5) + bit
|
||||
cp I_RCALL
|
||||
jr c, .spitRdBit
|
||||
cp I_IN
|
||||
jr c, .spitK12
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||||
cp I_BREAK
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||||
jp c, .spitINOUT
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cp I_ASR
|
||||
jp c, .spit ; no arg
|
||||
; spitRd5
|
||||
ld a, h
|
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rla \ rla \ rla
|
||||
or l
|
||||
ld c, a
|
||||
jr .spit
|
||||
.spitRegular:
|
||||
; Regular process which places H and L, ORring it with upcode. Works
|
||||
; in most cases.
|
||||
call .placeRd
|
||||
call .placeRr
|
||||
jr .spit
|
||||
jp .spit
|
||||
.spitRd5Rr5:
|
||||
ld a, h
|
||||
call .placeRd
|
||||
ld a, l
|
||||
; let's start with the 4 lower bits
|
||||
and 0xf
|
||||
or c
|
||||
; We now have our LSB in A. Let's spit it now.
|
||||
call ioPutB
|
||||
ld a, l
|
||||
; and now that last high bit, currently bit 4, which must become bit 1
|
||||
and 0b00010000
|
||||
rra \ rra \ rra
|
||||
or b
|
||||
ld b, a
|
||||
jp .spitMSB
|
||||
|
||||
.spitRdK8:
|
||||
ld a, h ; Rd
|
||||
call .placeRd
|
||||
call .placeRr
|
||||
rr b ; K(8) start at B's 1st bit, not 2nd
|
||||
jr .spit
|
||||
ld a, l ; K
|
||||
; let's start with the 4 lower bits
|
||||
and 0xf
|
||||
or c
|
||||
; We now have our LSB in A. Let's spit it now.
|
||||
call ioPutB
|
||||
ld a, l
|
||||
; and now those high 4 bits
|
||||
and 0xf0
|
||||
rra \ rra \ rra \ rra
|
||||
ld b, a
|
||||
jp .spitMSB
|
||||
|
||||
.spitk12:
|
||||
; k(12) in HL
|
||||
.spitRdBit:
|
||||
ld a, h
|
||||
call .placeRd
|
||||
or l
|
||||
; LSB is in A and is ready to go
|
||||
call ioPutB
|
||||
jr .spitMSB
|
||||
|
||||
.spitK12:
|
||||
; Let's deal with the upcode constant before we destroy IX below
|
||||
ld b, (ix+1)
|
||||
call readWord
|
||||
call parseExpr
|
||||
ret nz
|
||||
push ix \ pop hl
|
||||
; We're doing the same dance as in _readk7. See comments there.
|
||||
ld de, 0xfff
|
||||
add hl, de
|
||||
@ -333,13 +375,29 @@ parseInstruction:
|
||||
; We're within bounds! Now, divide by 2
|
||||
ld a, l
|
||||
rr h \ rra
|
||||
; LSB in A
|
||||
ld c, a
|
||||
; LSB in A, spit
|
||||
call ioPutB
|
||||
ld a, h
|
||||
and 0xf
|
||||
ld b, a
|
||||
jr .spit
|
||||
or b
|
||||
jp ioPutB
|
||||
|
||||
.spitINOUT:
|
||||
; Rd in H, A in L
|
||||
ld a, h
|
||||
call .placeRd
|
||||
ld a, l
|
||||
and 0xf
|
||||
or c
|
||||
; LSB ready
|
||||
call ioPutB
|
||||
; The two high bits of A go in bits 3:1 of MSB
|
||||
ld a, l
|
||||
rra \ rra \ rra
|
||||
and 0b110
|
||||
or b
|
||||
ld b, a
|
||||
jr .spitMSB
|
||||
.spit:
|
||||
; LSB is spit *before* MSB
|
||||
ld a, (ix+2)
|
||||
@ -406,29 +464,12 @@ parseInstruction:
|
||||
jr .spitBR2
|
||||
|
||||
; local routines
|
||||
; place number in H in BC at position .......d dddd....
|
||||
; place number in A in BC at position .......d dddd....
|
||||
; BC is assumed to be 0
|
||||
.placeRd:
|
||||
sla h \ rl h \ rl h \ rl h ; last RL H might set carry
|
||||
sla a \ rla \ rla \ rla ; last RLA might set carry
|
||||
rl b
|
||||
ld c, h
|
||||
ret
|
||||
|
||||
; place number in L in BC at position ...rrrr. ....rrrr
|
||||
; BC is assumed to be either 0 or to be set by .placeRd, that is, that the
|
||||
; high 4 bits of C and lowest bit of B will be preserved.
|
||||
.placeRr:
|
||||
; let's start with the 4 lower bits
|
||||
ld a, l
|
||||
and 0x0f
|
||||
or c
|
||||
ld c, a
|
||||
ld a, l
|
||||
; and now those high 4 bits which go in B.
|
||||
and 0xf0
|
||||
rra \ rra \ rra
|
||||
or b
|
||||
ld b, a
|
||||
ret
|
||||
|
||||
.swapHL:
|
||||
@ -450,7 +491,6 @@ parseInstruction:
|
||||
; 'a' - A 5-bit I/O port value
|
||||
; 'A' - A 6-bit I/O port value
|
||||
; 'b' - a 0-7 bit value
|
||||
; 'D' - A double-length number which will fill whole HL.
|
||||
; 'R' - an r5 value: r0-r31
|
||||
; 'r' - an r4 value: r16-r31
|
||||
;
|
||||
@ -466,8 +506,6 @@ argSpecs:
|
||||
.db 'R', 'b' ; Rd(5) + bit
|
||||
.db 'b', 7 ; bit + k(7)
|
||||
.db 'R', 'A' ; Rd(5) + A(6)
|
||||
.db 'D', 0 ; K(12)
|
||||
.db 'a', 'b' ; A(5) + bit
|
||||
|
||||
; Parse arguments from I/O according to specs in HL
|
||||
; H for first spec, L for second spec
|
||||
@ -477,18 +515,16 @@ argSpecs:
|
||||
; and thus parse their args themselves.
|
||||
; Z for success.
|
||||
_parseArgs:
|
||||
; For the duration of the routine, argspec is in DE and final MSB is
|
||||
; in BC. We place result in HL at the end.
|
||||
; For the duration of the routine, our final value will be in DE, and
|
||||
; then placed in HL at the end.
|
||||
push de
|
||||
push bc
|
||||
ld bc, 0
|
||||
ex de, hl ; argspecs now in DE
|
||||
call readWord
|
||||
jr nz, .end
|
||||
ld a, d
|
||||
call .parse
|
||||
jr nz, .end
|
||||
ld b, a
|
||||
ld d, a
|
||||
ld a, e
|
||||
or a
|
||||
jr z, .end ; no arg
|
||||
@ -500,12 +536,10 @@ _parseArgs:
|
||||
call .parse
|
||||
jr nz, .end
|
||||
; we're done with (HL) now
|
||||
ld c, a
|
||||
ld l, a
|
||||
cp a ; ensure Z
|
||||
.end:
|
||||
ld h, b
|
||||
ld l, c
|
||||
pop bc
|
||||
ld h, d
|
||||
pop de
|
||||
ret
|
||||
|
||||
@ -520,43 +554,42 @@ _parseArgs:
|
||||
jr z, _readBit
|
||||
cp 'A'
|
||||
jr z, _readA6
|
||||
cp 'a'
|
||||
jr z, _readA5
|
||||
cp 7
|
||||
jr z, _readk7
|
||||
cp 8
|
||||
jr z, _readK8
|
||||
cp 'D'
|
||||
jr z, _readDouble
|
||||
ret ; something's wrong
|
||||
|
||||
; Read expr and return success only if result in under number given in A
|
||||
; Z for success
|
||||
_readExpr:
|
||||
push ix
|
||||
push bc
|
||||
ld b, a
|
||||
call parseExpr
|
||||
jr nz, .end
|
||||
ld a, b
|
||||
call _IX2A
|
||||
jr nz, .end
|
||||
or c
|
||||
ld c, a
|
||||
cp a ; ensure Z
|
||||
.end:
|
||||
pop bc
|
||||
pop ix
|
||||
ret
|
||||
|
||||
_readBit:
|
||||
ld a, 7
|
||||
jr _readExpr
|
||||
|
||||
_readA6:
|
||||
ld a, 0x3f
|
||||
jr _readExpr
|
||||
|
||||
_readA5:
|
||||
ld a, 0x1f
|
||||
jr _readExpr
|
||||
|
||||
_readK8:
|
||||
ld a, 0xff
|
||||
jr _readExpr
|
||||
|
||||
_readDouble:
|
||||
push ix
|
||||
call parseExpr
|
||||
jr nz, .end
|
||||
push ix \ pop bc
|
||||
; BC is already set. For good measure, let's set A to BC's MSB
|
||||
ld a, b
|
||||
.end:
|
||||
pop ix
|
||||
ret
|
||||
|
||||
_readk7:
|
||||
push hl
|
||||
push de
|
||||
@ -578,7 +611,7 @@ _readk7:
|
||||
inc hl \ inc hl
|
||||
ex de, hl
|
||||
sbc hl, de
|
||||
jr c, .err ; Carry? error
|
||||
jp c, .err ; Carry? error
|
||||
ld de, 0x7f
|
||||
sbc hl, de
|
||||
; We're within bounds! However, our value in L is the number of
|
||||
@ -634,23 +667,4 @@ _IX2A:
|
||||
; Z set from "or a"
|
||||
ret
|
||||
|
||||
; Read expr and return success only if result in under number given in A
|
||||
; Z for success
|
||||
_readExpr:
|
||||
push ix
|
||||
push bc
|
||||
ld b, a
|
||||
call parseExpr
|
||||
jr nz, .end
|
||||
ld a, b
|
||||
call _IX2A
|
||||
jr nz, .end
|
||||
or c
|
||||
ld c, a
|
||||
cp a ; ensure Z
|
||||
.end:
|
||||
pop bc
|
||||
pop ix
|
||||
ret
|
||||
|
||||
|
||||
|
@ -14,8 +14,8 @@ main:
|
||||
ldi r16, RAMEND}8
|
||||
out SPH, r16
|
||||
|
||||
sbi DDRB, 0
|
||||
cbi PORTB, 0
|
||||
;sbi DDRB, 0
|
||||
;cbi PORTB, 0
|
||||
|
||||
; To have a blinking delay that's visible, we have to prescale a lot.
|
||||
; The maximum prescaler is 1024, which makes our TCNT0 increase
|
||||
@ -37,7 +37,7 @@ toggle:
|
||||
ldi r16, 0b00000010 ; TOV0
|
||||
out TIFR, R16
|
||||
inc r1
|
||||
cbi PORTB, 0
|
||||
;cbi PORTB, 0
|
||||
sbrs r1, 1 ; if LED is on
|
||||
sbi PORTB, 0
|
||||
;sbi PORTB, 0
|
||||
ret
|
||||
|
@ -1 +1 @@
|
||||
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|
||||
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|
Loading…
Reference in New Issue
Block a user