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4 Commits
9d2afd200c
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1536434666
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1536434666 | ||
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acf8e03f53 | ||
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019fd8a67d |
4
blk/754
4
blk/754
@ -4,7 +4,7 @@
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1 0xd0 OPr0 RORr1, 1 0xd1 OPr0 RORx1, 4 0xf7 OPr0 MULx,
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4 0xd0 OPr0 SHLr1, 4 0xd1 OPr0 SHLx1, 6 0xf6 OPr0 DIVr,
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5 0xd0 OPr0 SHRr1, 5 0xd1 OPr0 SHRx1, 6 0xf7 OPr0 DIVx,
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0 0xd2 OPr0 ROLrCL, 0 0xd3 OPr0 ROLxCL,
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1 0xd2 OPr0 RORrCL, 1 0xd3 OPr0 RORxCL,
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0 0xd2 OPr0 ROLrCL, 0 0xd3 OPr0 ROLxCL, 1 0xfe OPr0 DECr,
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1 0xd2 OPr0 RORrCL, 1 0xd3 OPr0 RORxCL, 0 0xfe OPr0 INCr,
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4 0xd2 OPr0 SHLrCL, 4 0xd3 OPr0 SHLxCL,
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5 0xd2 OPr0 SHRrCL, 5 0xd3 OPr0 SHRxCL,
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3
blk/760
3
blk/760
@ -4,7 +4,8 @@
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: BREAK?, DUP 0x8000 AND IF
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0x7fff AND 1 ALLOT THEN, -1 ALLOT
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THEN ; )
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: RPCs, PC - 1- A, ; : RPCn, PC - 2- A,, ;
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: RPCs, PC - 1- DUP 128 + 0xff > IF ABORT" PC ovfl" THEN A, ;
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: RPCn, PC - 2- A,, ;
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: AGAIN, ( BREAK?, ) RPCs, ;
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( Use RPCx with appropriate JMP/CALL op. Example:
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JMPs, 0x42 RPCs, or CALLn, 0x1234 RPCn, )
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7
blk/816
7
blk/816
@ -5,9 +5,10 @@ lblnext BSET PC 0x1d - ORG @ 0x1b + ! ( next )
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lblexec BSET PC 0x36 - ORG @ 0x34 + ! ( DI -> wordref )
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AL [DI] MOVr[], DI INCx, ( PFA )
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AL AL ORrr, IFZ, DI JMPr, THEN, ( native )
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( continue to compiled )
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PC 0x11 - ORG @ 0x0f + ! ( compiled -- DI -> PFA )
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AL DECr, IFNZ, ( cell or does )
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DI PUSHx, ( push PFA ) JMPs, lblnext @ RPCs,
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( TODO: implement does )
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THEN, ( compiled )
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BP INCx, BP INCx, [BP] 0 DX MOV[]+x, ( pushRS )
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DX DI MOVxx, DX INCx, DX INCx, ( --> IP )
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DI [DI] MOVx[],
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2
blk/820
2
blk/820
@ -1,6 +1,6 @@
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( native words )
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CODE EXECUTE
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DI POPx, JMPs, lblexec @ RPCs,
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DI POPx, JMPn, lblexec @ RPCn,
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CODE >R
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BP INCx, BP INCx, [BP] 0 POP[w]+,
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;CODE NOP, NOP, NOP,
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6
blk/821
6
blk/821
@ -1,10 +1,10 @@
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CODE DUP AX POPx, AX PUSHx, AX PUSHx, ;CODE
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CODE ?DUP AX POPx, AX AX ORxx, IFNZ, AX PUSHx, THEN, ;CODE
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CODE ?DUP AX POPx, AX AX ORxx, AX PUSHx,
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IFNZ, AX PUSHx, THEN, ;CODE
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CODE DROP AX POPx, ;CODE
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CODE SWAP AX POPx, BX POPx, AX PUSHx, BX PUSHx, ;CODE
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CODE OVER ( a b -- a b a )
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DI SP MOVxx, AX [DI] 2 MOVx[]+, AX PUSHx,
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;CODE
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DI SP MOVxx, AX [DI] 2 MOVx[]+, AX PUSHx, ;CODE
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CODE PICK
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DI POPx, DI SHLx1, ( x2 )
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DI SP ADDxx, DI [DI] MOVx[], DI PUSHx,
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5
blk/828
5
blk/828
@ -1,5 +0,0 @@
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CODE EMIT
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AX POPx, AH 0x0e MOVri, ( print char ) 0x10 INT,
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;CODE
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: FOO '0' 1 3 LSHIFT + EMIT ;
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: BOOT 0x08 @ LIT< FOO _find DROP EXECUTE BYE ;
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@ -42,8 +42,8 @@ static uint8_t iord_stdio()
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static void iowr_stdio(uint8_t val)
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{
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// uncomment when you need to debug staging
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// putc(val, stderr);
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// comment if you don't like verbose staging output
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putc(val, stderr);
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}
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static void iowr_here(uint8_t val)
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@ -4,7 +4,14 @@ RS_ADDR 0x80 - CONSTANT RAMSTART
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750 LOAD ( 8086 asm )
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262 LOAD ( xcomp )
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270 LOAD ( xcomp overrides )
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812 828 LOADR
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812 827 LOADR
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353 LOAD ( xcomp core low )
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CODE (emit)
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AX POPx, AH 0x0e MOVri, ( print char ) 0x10 INT,
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;CODE
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CODE (key) AH AH XORrr, 0x16 INT, AX PUSHx, ;CODE
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: FOO (key) (emit) ;
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: BOOT 0x08 @ LIT< FOO _find DROP EXECUTE BYE ;
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(entry) _
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( Update LATEST )
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PC ORG @ 8 + !
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