Virgil Dupras
d4f65911c0
rc2014: add notes about stage3.bin
2020-04-12 14:15:06 -04:00
Virgil Dupras
420836276d
readln: rename (c<) to (rdln<)
...
so that it isn't picked up automatically at boot. Only when (c<$) is
called do we override (c<). This fixes tricky boot problems.
2020-04-12 14:01:54 -04:00
Virgil Dupras
d6c9ab3f32
tools/stripfc: strip a little bit more
2020-04-12 12:47:50 -04:00
Virgil Dupras
9548514ff0
rc2014: dictionary relinking now works!
2020-04-12 10:24:53 -04:00
Virgil Dupras
06d0a02c12
link: fix LITA processing
2020-04-12 09:36:10 -04:00
Virgil Dupras
9390479d49
link: minor tweaks
2020-04-11 18:43:43 -04:00
Virgil Dupras
bf447f58c5
link: handle doesWord
2020-04-11 16:38:45 -04:00
Virgil Dupras
13cf294201
rc2014/acia: adjust to latest developments
2020-04-11 15:11:36 -04:00
Virgil Dupras
3accc73f38
link: add LITA handling
2020-04-11 14:02:42 -04:00
Virgil Dupras
c515720e23
Revert "Remove link.fs"
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Let's revisit the relinking approach, with LITA this time.
This reverts commit 6652125d47
2020-04-11 13:31:17 -04:00
Virgil Dupras
0c6cabfd33
doc improvement
2020-04-11 13:19:30 -04:00
Virgil Dupras
af3db1c3cf
Add word "LITA"
2020-04-11 13:13:20 -04:00
Virgil Dupras
3822182226
xcomp: shrink scope
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It seems that xcomp can't manage to reliably compile core+ units.
Let's limit the role of xcomp to z80c+icore.
I'm getting a little desperate here. I'll revisit the link.fs approach
with a new idea I had...
2020-04-11 11:38:45 -04:00
Virgil Dupras
6368cc3bac
Remove (sysv)
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Replace its usages with direct RAM+ offsets. The (sysv) mechanism was
incompatible with cross-compilation of a full interpreter.
2020-04-10 14:57:00 -04:00
Virgil Dupras
a6efb65010
emul: extract capture mark from icore into xstop.fs
2020-04-10 14:16:45 -04:00
Virgil Dupras
f62376bd0a
boot: remove _bend
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It's not needed anymore now that the boot binary is built in one pass.
2020-04-10 09:59:45 -04:00
Virgil Dupras
7aa1be070b
emul: build boot binary in one pass
...
... instead of building boot.fs, and then z80c.fs/icore.fs in separate
passes. This strengten xcomp by making it support 2 completely separate
dicts (that is, the X dict is *not* connected to the system dict. The chain
now stops at EXIT def in boot.fs).
2020-04-10 09:55:58 -04:00
Virgil Dupras
c8c337fd58
xcomp: widen scope
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We can now cross-compile core.fs.
2020-04-10 07:53:41 -04:00
Virgil Dupras
54929c2aa0
xcomp: simplify further
2020-04-09 12:10:43 -04:00
Virgil Dupras
e6d3638f4f
Add CURRENT* and simplify xcomp
2020-04-09 12:01:08 -04:00
Virgil Dupras
f1171c656c
xcomp: make (xfind) use _find instead of (find)
2020-04-09 11:24:43 -04:00
Virgil Dupras
1b6286dcfe
Make (find) 2-layered, the lower layer having CURRENT as a param
2020-04-09 11:20:54 -04:00
Virgil Dupras
66dc621919
xcomp: don't automatically shadow core words
2020-04-09 09:43:48 -04:00
Virgil Dupras
0c3067ed9a
icore: simplify definition of ":" and ";"
2020-04-09 09:38:59 -04:00
Virgil Dupras
784b109652
So, why was ":" an immediate again?
2020-04-09 09:27:51 -04:00
Virgil Dupras
afed423530
Remove memory maps
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It was a dead end. my new tentative solution is xcomp.
2020-04-09 09:21:55 -04:00
Virgil Dupras
6c48c1b53c
parse: be a bit more graceful on parsing meta-failure
2020-04-09 08:27:14 -04:00
Virgil Dupras
b69ca4488e
Add emul_memdump() and stop automatically on ROM write
2020-04-09 08:26:41 -04:00
Virgil Dupras
6f082b0b13
Change DELW signature
2020-04-09 08:26:27 -04:00
Virgil Dupras
68f359d6c2
Add xcomp unit for cross compilation
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Memory mapping is a dead end too, solution has to be at a higher
level. xcomp is my new approach.
2020-04-09 08:23:53 -04:00
Virgil Dupras
b5638d142a
Add word "DELW"
2020-04-08 20:40:23 -04:00
Virgil Dupras
2a2e3a64a4
Move IMMED? from z80c to icore
2020-04-08 20:09:32 -04:00
Virgil Dupras
a7a2f3d08b
Move IMMEDIATE from z80c to core
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This makes IMMEDIATE affected by memory mappings.
2020-04-08 19:43:44 -04:00
Virgil Dupras
64e441d059
Move SCPY from z80c to icore
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This way, it can be affected by memory mappers.
2020-04-08 16:12:34 -04:00
Virgil Dupras
05c38424c7
recipes/rc2014: stage2 WIP
2020-04-08 09:13:46 -04:00
Virgil Dupras
4515241318
drv/acia: fix broken buffer bounds
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How did this ever work?
2020-04-08 08:26:04 -04:00
Virgil Dupras
79527976ab
recipes/rc2014: stage2 WIP
2020-04-07 22:36:59 -04:00
Virgil Dupras
6652125d47
Remove link.fs
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This was a dead end.
2020-04-07 21:23:42 -04:00
Virgil Dupras
ba918d0fef
Add memory maps
2020-04-07 20:54:10 -04:00
Virgil Dupras
d4324292fb
Merge remote-tracking branch 'origin/master' into forth
2020-04-07 19:32:30 -04:00
Virgil Dupras
e37f4c2551
bin2c: add missing stdtypes.h
2020-04-07 18:13:42 -04:00
Byron A. Grobe
217df20d77
Moved tools/bin2c to single-level with other tools.
2020-04-07 16:56:55 -05:00
Virgil Dupras
521ff84ca4
Reserve some RAM for future features
2020-04-07 17:32:04 -04:00
Virgil Dupras
71d1350143
emul/hw/rc2014: add memdump command
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Why didn't I think of adding it before?
2020-04-07 13:37:52 -04:00
Virgil Dupras
a09e552ccc
link: fix literal ASKIP
2020-04-07 11:26:47 -04:00
Virgil Dupras
400f0ab0b0
boot: fix flagsToBC
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Why did I ever think that using CM was a good idea? any comparison
with numbers more than 0x8000 apart would be wrong...
2020-04-07 11:26:37 -04:00
Virgil Dupras
1c6e979028
link: new unit to relink dictionaries
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Not quite functional yet, but works in toy situations. The goal is to
concatenate RC2014's bootstrapped dict to the boot binary.
2020-04-06 20:59:55 -04:00
Virgil Dupras
9a8c25ceb4
core: fix PSP leak in MOVE
2020-04-06 19:59:20 -04:00
Virgil Dupras
7cd9d29cd8
core: fix MOVE so it copies the right number of bytes
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It copied one too much.
2020-04-06 16:54:56 -04:00
Virgil Dupras
058b85686f
core: add word "MOVE"
2020-04-05 21:02:38 -04:00
