1
0
mirror of https://github.com/hsoft/collapseos.git synced 2024-11-27 09:48:05 +11:00

Move 8086 assembler from B730 to B30

Also, move doc to doc/asm.txt.

Also, fix the pcat recipe which was broken since the overlay change.
I hadn't noticed it because I didn't have to rebuild the MBR.
This commit is contained in:
Virgil Dupras 2020-09-21 19:23:33 -04:00
parent 91f79d1131
commit b21be43535
21 changed files with 37 additions and 29 deletions

View File

@ -1,6 +1,7 @@
MASTER INDEX
005 Z80 assembler 30-99 unused
005 Z80 assembler 030 8086 assembler
50-99 unused
100 Block editor 120 Visual Editor
160-259 unused 260 Cross compilation
280 Z80 boot code 350 Core words
@ -8,5 +9,5 @@ MASTER INDEX
440-519 unused 520 Fonts
550-649 unused
650 AVR assembler 690 AVR SPI programmer
700-729 unused 730 8086 assembler
700-799 unused
800 8086 boot code

2
blk/030 Normal file
View File

@ -0,0 +1,2 @@
( 8086 assembler. See doc/asm.txt )
1 13 LOADR+

View File

View File

View File

View File

View File

View File

View File

View File

View File

View File

View File

View File

View File

@ -1,8 +1,8 @@
Z80 boot code
This assembles the boot binary. It requires the Z80 assembler
(B200) and cross compilation setup (B260). It requires some
constants to be set. See B420 for details.
(B5) and cross compilation setup (B260). It requires some
constants to be set. See doc/bootstrap.txt for details.
RESERVED REGISTERS: At all times, IX points to RSP TOS and BC
is IP. SP points to PSP TOS, but you can still use the stack

15
blk/730
View File

@ -1,15 +0,0 @@
8086 assembler
Work in progress. Load with "750 LOAD".
Mnemonics are followed by argument types. For example, MOVri,
moves 8-bit immediate to 8-bit register.
'r' = 8-bit register 'x' = 16-bit register
'i' = 8-bit immediate 'I' = 16-bit immediate
's' = SREG register
Mnemonics that only have one signature (for example INT,) don't
have operands letters.
For jumps, it's special. 's' is SHORT, 'n' is NEAR, 'f' is FAR.

View File

@ -1 +0,0 @@
1 13 LOADR+

View File

@ -5,10 +5,10 @@ There are sections, below, for each supported architectures, but
you should read this first section first to be familiar with
those common, basic principles)
Words in the Z80 assembler (B5) allow you to assemble z80 bin-
aries. Being Forth words, opcode assembly is a bit different
than with a typical assembler. For example, what would tradi-
tionally be "ld a, b" would become "A B LDrr,".
Words in the Z80 assembler, loaded with "5 LOAD" allow you to
assemble z80 binaries. Being Forth words, opcode assembly is a
bit different than with a typical assembler. For example, what
would traditionally be "ld a, b" would become "A B LDrr,".
Those opcode words, of which there is a complete list below, end
with "," to indicate that their effect is to write (,) the cor-
@ -138,3 +138,24 @@ RR RRC SRL RRA RRCA
CALL RST DJNZ
DI EI EXDEHL EXX HALT
NOP RET [,c] RETI RETN SCF
# 8086 assembler
Load with "30 LOAD". As with the Z80 assembler, it is incom-
plete.
Mnemonics are followed by argument types. For example, MOVri,
moves 8-bit immediate to 8-bit register.
'r' = 8-bit register 'x' = 16-bit register
'i' = 8-bit immediate 'I' = 16-bit immediate
's' = SREG register
Mnemonics that only have one signature (for example INT,) don't
have operands letters.
For jumps, it's special. 's' is SHORT, 'n' is NEAR, 'f' is FAR.
# 8086 Instructions list
TODO

View File

@ -18,8 +18,8 @@ blkfs: $(BLKPACK)
$(STAGE):
$(MAKE) -C $(CDIR) stage
mbr.bin: mbr.fs $(STAGE)
cat mbr.fs | $(STAGE) > $@
mbr.bin: mbr.fs $(STAGE) blkfs
cat mbr.fs | $(STAGE) blkfs > $@
$(TARGET): mbr.bin os.bin
cat mbr.bin os.bin > $@

View File

@ -1,7 +1,7 @@
0xff00 CONSTANT RS_ADDR
0xfffa CONSTANT PS_ADDR
RS_ADDR 0x80 - CONSTANT SYSVARS
750 LOAD ( 8086 asm )
30 LOAD ( 8086 asm )
262 LOAD ( xcomp ) 270 LOAD ( xcomp overrides )
805 820 LOADR ( 8086 boot code )
353 LOAD ( xcomp core low )

View File

@ -1,4 +1,4 @@
750 LOAD
832 LOAD
30 LOAD
602 LOAD
ORG @ 256 /MOD 2 PC! 2 PC!
H@ 256 /MOD 2 PC! 2 PC!