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drv/acia: latest bells and whistles

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This commit is contained in:
Virgil Dupras 2020-04-16 08:18:55 -04:00
parent 4eca827d36
commit b01de82fd1
2 changed files with 33 additions and 32 deletions
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4
drv/acia.fs
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@ -29,7 +29,7 @@ ACIA_MEM: Address in memory that can be used variables shared
: ACIA$ : ACIA$
H@ DUP DUP ACIA( ! ACIAR> ! H@ DUP DUP ACIA( ! ACIAR> !
1 + ACIAW> ! ( write index starts one position later ) 1+ ACIAW> ! ( write index starts one position later )
ACIABUFSZ ALLOT ACIABUFSZ ALLOT
H@ ACIA) ! H@ ACIA) !
( setup ACIA ( setup ACIA
@ -49,7 +49,7 @@ ACIA_MEM: Address in memory that can be used variables shared
: KEY : KEY
( inc then fetch ) ( inc then fetch )
ACIAR> @ 1 + DUP ACIA) @ = IF ACIAR> @ 1+ DUP ACIA) @ = IF
DROP ACIA( @ DROP ACIA( @
THEN THEN

61
drv/acia.z80
View File

@ -20,37 +20,38 @@ ACIA_MEM
( Read our character from ACIA into our BUFIDX ) ( Read our character from ACIA into our BUFIDX )
ACIA_CTL INAn, ACIA_CTL INAn,
0x01 ANDn, ( is ACIA rcv buf full? ) 0x01 ANDn, ( is ACIA rcv buf full? )
JRZ, L2 FWR ( end, no, wrong interrupt cause. ) IFNZ,
( correct interrupt cause )
( +2 == ACIAW> )
ACIA_MEM 2+ LDHL(nn),
( is it == to ACIAR>? )
( +0 == ACIAR> )
DE ACIA_MEM LDdd(nn),
( carry cleared from ANDn above )
DE SBCHLss,
IFNZ, ( buffer full? )
( no, continue )
DE ADDHLss, ( restore ACIAW> )
( buffer not full, let's write )
ACIA_IO INAn,
(HL) A LDrr,
( +2 == ACIAW> ) ( advance W> )
ACIA_MEM 2 + LDHL(nn), HL INCss,
( is it == to ACIAR>? ) ( +2 == ACIAW> )
( +0 == ACIAR> ) ACIA_MEM 2+ LD(nn)HL,
DE ACIA_MEM LDdd(nn), ( +6 == ACIA) )
( carry cleared from ANDn above ) DE ACIA_MEM 6 + LDdd(nn),
DE SBCHLss, DE SUBHLss,
JRZ, L3 FWR ( end, buffer full ) IFZ, ( end of buffer reached? )
( yes )
DE ADDHLss, ( restore ACIAW> ) ( +4 == ACIA( )
( buffer not full, let's write ) ACIA_MEM 4 + LDHL(nn),
ACIA_IO INAn, ( +2 == ACIAW> )
(HL) A LDrr, ACIA_MEM 2+ LD(nn)HL,
THEN,
( advance W> ) THEN,
HL INCss, THEN,
( +2 == ACIAW> )
ACIA_MEM 2 + LD(nn)HL,
( +6 == ACIA) )
DE ACIA_MEM 6 + LDdd(nn),
DE SUBHLss,
JRNZ, L4 FWR ( skip )
( end of buffer reached )
( +4 == ACIA( )
ACIA_MEM 4 + LDHL(nn),
( +2 == ACIAW> )
ACIA_MEM 2 + LD(nn)HL,
L4 FSET ( skip )
L3 FSET L2 FSET ( end )
DE POPqq, DE POPqq,
HL POPqq, HL POPqq,