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drv/acia: latest bells and whistles

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This commit is contained in:
Virgil Dupras 2020-04-16 08:18:55 -04:00
parent 4eca827d36
commit b01de82fd1
2 changed files with 33 additions and 32 deletions
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17
drv/acia.z80
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@ -20,8 +20,8 @@ ACIA_MEM
( Read our character from ACIA into our BUFIDX ) ( Read our character from ACIA into our BUFIDX )
ACIA_CTL INAn, ACIA_CTL INAn,
0x01 ANDn, ( is ACIA rcv buf full? ) 0x01 ANDn, ( is ACIA rcv buf full? )
JRZ, L2 FWR ( end, no, wrong interrupt cause. ) IFNZ,
( correct interrupt cause )
( +2 == ACIAW> ) ( +2 == ACIAW> )
ACIA_MEM 2+ LDHL(nn), ACIA_MEM 2+ LDHL(nn),
( is it == to ACIAR>? ) ( is it == to ACIAR>? )
@ -29,8 +29,8 @@ ACIA_MEM
DE ACIA_MEM LDdd(nn), DE ACIA_MEM LDdd(nn),
( carry cleared from ANDn above ) ( carry cleared from ANDn above )
DE SBCHLss, DE SBCHLss,
JRZ, L3 FWR ( end, buffer full ) IFNZ, ( buffer full? )
( no, continue )
DE ADDHLss, ( restore ACIAW> ) DE ADDHLss, ( restore ACIAW> )
( buffer not full, let's write ) ( buffer not full, let's write )
ACIA_IO INAn, ACIA_IO INAn,
@ -43,14 +43,15 @@ ACIA_MEM
( +6 == ACIA) ) ( +6 == ACIA) )
DE ACIA_MEM 6 + LDdd(nn), DE ACIA_MEM 6 + LDdd(nn),
DE SUBHLss, DE SUBHLss,
JRNZ, L4 FWR ( skip ) IFZ, ( end of buffer reached? )
( end of buffer reached ) ( yes )
( +4 == ACIA( ) ( +4 == ACIA( )
ACIA_MEM 4 + LDHL(nn), ACIA_MEM 4 + LDHL(nn),
( +2 == ACIAW> ) ( +2 == ACIAW> )
ACIA_MEM 2+ LD(nn)HL, ACIA_MEM 2+ LD(nn)HL,
L4 FSET ( skip ) THEN,
L3 FSET L2 FSET ( end ) THEN,
THEN,
DE POPqq, DE POPqq,
HL POPqq, HL POPqq,