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Add "avr/" includes folder
Also, add a "real world" example in AVRA tests, a blink program on a ATtiny45. Some instructions are commented out because they aren't implemented yet, but not many. The output of the program has been verified against AVRA's own output.
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16
avr/README.md
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avr/README.md
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# AVR include files
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This folder contains header files that can be included in AVR assembly code.
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These definitions are organized in a manner that is very similar to other
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modern AVR assemblers, but most bits definitions (`PINB4`, `WGM01`, etc.) are
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absent. This is because there's a lot of them, each symbol takes memory during
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assembly and machines doing the assembling might be tight in memory. AVR code
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post collapse will have to take the habit of using numerical masks accompanied
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by comments describing associated symbols.
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To avoid repeats, those includes are organized in 3 levels. First, there's the
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`avr.h` file containing definitions common to all AVR models. Then, there's the
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"family" file containing definitions common to a "family" (for example, the
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ATtiny 25/45/85). Those definitions are the beefiests. Then, there's the exact
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model file, which will typically contain RAM and Flash boundaries.
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avr/avr.h
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avr/avr.h
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; *** CPU registers aliases ***
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.equ XH 27
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.equ XL 26
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.equ YH 29
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.equ YL 28
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.equ ZH 31
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.equ ZL 30
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.equ SREG_C 0 ; Carry Flag
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.equ SREG_Z 1 ; Zero Flag
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.equ SREG_N 2 ; Negative Flag
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.equ SREG_V 3 ; Two's Complement Overflow Flag
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.equ SREG_S 4 ; Sign Bit
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.equ SREG_H 5 ; Half Carry Flag
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.equ SREG_T 6 ; Bit Copy Storage
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.equ SREG_I 7 ; Global Interrupt Enable
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avr/tn25.h
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avr/tn25.h
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.equ FLASHEND 0x03ff ; Note: Word address
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.equ IOEND 0x003f
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.equ SRAM_START 0x0060
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.equ SRAM_SIZE 128
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.equ RAMEND 0x00df
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.equ XRAMEND 0x0000
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.equ E2END 0x007f
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.equ EEPROMEND 0x007f
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.equ EEADRBITS 7
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avr/tn254585.h
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avr/tn254585.h
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; *** Registers ***
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.equ SREG 0x3f
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.equ SPH 0x3e
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.equ SPL 0x3d
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.equ GIMSK 0x3b
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.equ GIFR 0x3a
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.equ TIMSK 0x39
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.equ TIFR 0x38
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.equ SPMCSR 0x37
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.equ MCUCR 0x35
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.equ MCUSR 0x34
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.equ TCCR0B 0x33
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.equ TCNT0 0x32
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.equ OSCCAL 0x31
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.equ TCCR1 0x30
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.equ TCNT1 0x2f
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.equ OCR1A 0x2e
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.equ OCR1C 0x2d
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.equ GTCCR 0x2c
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.equ OCR1B 0x2b
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.equ TCCR0A 0x2a
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.equ OCR0A 0x29
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.equ OCR0B 0x28
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.equ PLLCSR 0x27
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.equ CLKPR 0x26
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.equ DT1A 0x25
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.equ DT1B 0x24
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.equ DTPS 0x23
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.equ DWDR 0x22
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.equ WDTCR 0x21
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.equ PRR 0x20
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.equ EEARH 0x1f
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.equ EEARL 0x1e
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.equ EEDR 0x1d
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.equ EECR 0x1c
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.equ PORTB 0x18
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.equ DDRB 0x17
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.equ PINB 0x16
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.equ PCMSK 0x15
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.equ DIDR0 0x14
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.equ GPIOR2 0x13
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.equ GPIOR1 0x12
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.equ GPIOR0 0x11
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.equ USIBR 0x10
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.equ USIDR 0x0f
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.equ USISR 0x0e
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.equ USICR 0x0d
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.equ ACSR 0x08
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.equ ADMUX 0x07
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.equ ADCSRA 0x06
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.equ ADCH 0x05
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.equ ADCL 0x04
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.equ ADCSRB 0x03
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; *** Interrupt vectors ***
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.equ INT0addr 0x0001 ; External Interrupt 0
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.equ PCI0addr 0x0002 ; Pin change Interrupt Request 0
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.equ OC1Aaddr 0x0003 ; Timer/Counter1 Compare Match 1A
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.equ OVF1addr 0x0004 ; Timer/Counter1 Overflow
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.equ OVF0addr 0x0005 ; Timer/Counter0 Overflow
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.equ ERDYaddr 0x0006 ; EEPROM Ready
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.equ ACIaddr 0x0007 ; Analog comparator
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.equ ADCCaddr 0x0008 ; ADC Conversion ready
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.equ OC1Baddr 0x0009 ; Timer/Counter1 Compare Match B
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.equ OC0Aaddr 0x000a ; Timer/Counter0 Compare Match A
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.equ OC0Baddr 0x000b ; Timer/Counter0 Compare Match B
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.equ WDTaddr 0x000c ; Watchdog Time-out
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.equ USI_STARTaddr 0x000d ; USI START
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.equ USI_OVFaddr 0x000e ; USI Overflow
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.equ INT_VECTORS_SIZE 15 ; size in words
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avr/tn45.h
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avr/tn45.h
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.equ FLASHEND 0x07ff ; Note: Word address
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.equ IOEND 0x003f
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.equ SRAM_START 0x0060
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.equ SRAM_SIZE 256
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.equ RAMEND 0x015f
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.equ XRAMEND 0x0000
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.equ E2END 0x00ff
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.equ EEPROMEND 0x00ff
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.equ EEADRBITS 8
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avr/tn85.h
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avr/tn85.h
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.equ FLASHEND 0x0fff ; Note: Word address
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.equ IOEND 0x003f
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.equ SRAM_START 0x0060
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.equ SRAM_SIZE 512
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.equ RAMEND 0x025f
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.equ XRAMEND 0x0000
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.equ E2END 0x01ff
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.equ EEPROMEND 0x01ff
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.equ EEADRBITS 9
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43
tools/tests/avra/blink_tn45.asm
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tools/tests/avra/blink_tn45.asm
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; TODO: implement instructions that are commented out
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; REGISTER USAGE
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;
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; R1: overflow counter
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; R16: tmp stuff
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.inc "avr.h"
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.inc "tn254585.h"
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.inc "tn45.h"
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main:
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ldi r16, RAMEND&0xff
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out SPL, r16
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ldi r16, RAMEND}8
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out SPH, r16
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;sbi DDRB, 0
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;cbi PORTB, 0
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; To have a blinking delay that's visible, we have to prescale a lot.
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; The maximum prescaler is 1024, which makes our TCNT0 increase
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; 976 times per second, which means that it overflows 4 times per
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; second.
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in r16, TCCR0B
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ori r16, 0x05 ; CS00 + CS02 = 1024 prescaler
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out TCCR0B, r16
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;clr r1
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loop:
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in r16, TIFR ; TIFR0
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sbrc r16, 1 ; is TOV0 flag clear?
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rcall toggle
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rjmp loop
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toggle:
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ldi r16, 0b00000010 ; TOV0
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out TIFR, R16
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inc r1
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;cbi PORTB, 0
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sbrs r1, 1 ; if LED is on
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;sbi PORTB, 0
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ret
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1
tools/tests/avra/blink_tn45.expected
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1
tools/tests/avra/blink_tn45.expected
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#!/bin/sh -e
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AVRA=../../emul/zasm/avra
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ZASM=../../zasm.sh
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AVRINC=../../../avr
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cmpas() {
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FN=$1
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EXPECTED=$(xxd ${FN%.*}.expected)
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ACTUAL=$(cat ${FN} | $AVRA | xxd)
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ACTUAL=$(cat ${FN} | "${ZASM}" -a "${AVRINC}" | xxd)
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if [ "$ACTUAL" = "$EXPECTED" ]; then
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echo ok
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else
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# binary. For example, "zasm.sh -o 4f < foo.asm" assembles foo.asm as if it
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# started with the line ".org 0x4f00".
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# The -a flag makes us switch to the AVR assembler
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# readlink -f doesn't work with macOS's implementation
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# so, if we can't get readlink -f to work, try python with a realpath implementation
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ABS_PATH=$(readlink -f "$0" || python -c "import os; print(os.path.realpath('$0'))")
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DIR=$(dirname "${ABS_PATH}")
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ZASMBIN="${DIR}/emul/zasm/zasm"
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usage() { echo "Usage: $0 [-o <hexorg>] <paths-to-include>..." 1>&2; exit 1; }
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usage() { echo "Usage: $0 [-a] [-o <hexorg>] <paths-to-include>..." 1>&2; exit 1; }
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org='00'
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while getopts ":o:" opt; do
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while getopts ":ao:" opt; do
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case "${opt}" in
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a)
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ZASMBIN="${DIR}/emul/zasm/avra"
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;;
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o)
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org=${OPTARG}
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;;
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@ -26,8 +33,6 @@ done
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shift $((OPTIND-1))
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# wrapper around ./emul/zasm/zasm that prepares includes CFS prior to call
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DIR=$(dirname "${ABS_PATH}")
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ZASMBIN="${DIR}/emul/zasm/zasm"
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CFSPACK="${DIR}/cfspack/cfspack"
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INCCFS=$(mktemp)
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