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trs80: adapt recipe to single stage xcomp

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This commit is contained in:
Virgil Dupras 2020-05-14 12:08:17 -04:00
parent 8a58449776
commit a8e8204eba
8 changed files with 9 additions and 12 deletions
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3
blk/490
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@ -4,8 +4,7 @@ Support code for the TRS-80 recipe. Contains drivers for the
keyboard, video and floppy. At the moment, they are thin layer keyboard, video and floppy. At the moment, they are thin layer
over the drivers provided by TRSDOS' SVC. over the drivers provided by TRSDOS' SVC.
Load the Z80 words with "492 LOAD" and the high level part Load with "492 LOAD".
with "498 LOAD".
There is also the RECV program at B502 and the XCOMP unit at There is also the RECV program at B502 and the XCOMP unit at
B504 B504

2
blk/492
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@ -1 +1 @@
1 5 LOADR+ 1 8 LOADR+

1
blk/498
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@ -1 +0,0 @@
1 2 LOADR+

2
blk/499
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@ -1,4 +1,4 @@
: _err ABORT" FDerr" ; : _err LIT" FDerr" ERR ;
: _cylsec ( sec -- cs, return sector/cylinder for given secid ) : _cylsec ( sec -- cs, return sector/cylinder for given secid )
( 4 256b sectors per block, 10 sec per cyl, 40 cyl max ) ( 4 256b sectors per block, 10 sec per cyl, 40 cyl max )
10 /MOD ( sec cyl ) 10 /MOD ( sec cyl )

2
blk/500
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@ -2,6 +2,6 @@
: FD! ['] @WRSEC SWAP FD@! ; : FD! ['] @WRSEC SWAP FD@! ;
: FD$ ['] FD@ BLK@* ! ['] FD! BLK!* ! ; : FD$ ['] FD@ BLK@* ! ['] FD! BLK!* ! ;
: _err ABORT" *CLerr" ; : _err LIT" *CLerr" ERR ;
: *CL< 0 BEGIN DROP 0x0238 @GET UNTIL ; : *CL< 0 BEGIN DROP 0x0238 @GET UNTIL ;
: *CL> 0x0238 @PUT NOT IF _err THEN ; : *CL> 0x0238 @PUT NOT IF _err THEN ;

2
recipes/trs80/Makefile
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@ -1,4 +1,4 @@
TARGET = stage1.bin TARGET = os.bin
EDIR = ../../emul EDIR = ../../emul
STAGE = $(EDIR)/stage STAGE = $(EDIR)/stage

6
recipes/trs80/README.md
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@ -67,10 +67,10 @@ kind of reception! You're gonna feel real badass about it too...
* `_` is `CLEAR+ENTER`. * `_` is `CLEAR+ENTER`.
## Building the stage 1 ## Building the binary
You can start the process by building the stage 1 binary. Running `make` in You can build the binary to send to the TRS-80 with `make`, which will yield
this folder will yield a `stage1.bin` file. You'll need it later. `os.bin`. You'll need it later.
## Testing serial communication ## Testing serial communication

3
recipes/trs80/xcomp.fs
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@ -7,14 +7,13 @@ RS_ADDR 0x80 - CONSTANT RAMSTART
0x3000 BIN( ! 0x3000 BIN( !
282 LOAD ( boot.z80 ) 282 LOAD ( boot.z80 )
492 LOAD ( trs80.z80 )
393 LOAD ( xcomp core low ) 393 LOAD ( xcomp core low )
492 LOAD ( trs80 )
420 LOAD ( xcomp core high ) 420 LOAD ( xcomp core high )
(entry) _ (entry) _
( Update LATEST ) ( Update LATEST )
PC ORG @ 8 + ! PC ORG @ 8 + !
," CURRENT @ HERE ! " ," CURRENT @ HERE ! "
499 500 XPACKR ( trs80.fs )
( 0x0a == NLPTR. TRS-80 wants CR-only newlines ) ( 0x0a == NLPTR. TRS-80 wants CR-only newlines )
," : _ ['] CR 0x0a RAM+ ! BLK$ FD$ (ok) RDLN$ ; _ " ," : _ ['] CR 0x0a RAM+ ! BLK$ FD$ (ok) RDLN$ ; _ "
ORG @ 256 /MOD 2 PC! 2 PC! ORG @ 256 /MOD 2 PC! 2 PC!