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https://github.com/hsoft/collapseos.git
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Copy ACIA driver to blkfs
We can get rid of acia.z80, but not of acia.fs yet, we still need it.
This commit is contained in:
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dd6ce1b8fe
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blk/001
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blk/001
@ -3,7 +3,7 @@ MASTER INDEX
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3 Usage 30 Dictionary
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3 Usage 30 Dictionary
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70 Implementation notes 100 Block editor
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70 Implementation notes 100 Block editor
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200 Z80 assembler 260 Cross compilation
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200 Z80 assembler 260 Cross compilation
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280 Z80 boot code
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280 Z80 boot code 350 ACIA driver
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15
blk/350
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15
blk/350
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ACIA driver
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Manage I/O from an asynchronous communication interface adapter
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(ACIA). provides "EMIT" to put c char on the ACIA as well as
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an input buffer. You have to call "~ACIA" on interrupt for
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this module to work well.
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CONFIGURATION
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ACIA_CTL: IO port for the ACIA's control registers
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ACIA_IO: IO port for the ACIA's data registers
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ACIA_MEM: Address in memory that can be used variables shared
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with ACIA's native words. 8 bytes used.
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Load z80 words with "352 LOAD" and Forth words with "357 LOAD".
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15
blk/352
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15
blk/352
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( Save ACIA conf )
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ACIA_CTL
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: ACIA_CTL [ LITN ] ;
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ACIA_IO
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: ACIA_IO [ LITN ] ;
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ACIA_MEM
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: ACIA_MEM [ LITN ] ;
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( Memory layout
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+0 ACIAR>
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+2 ACIAW>
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+4 ACIA(
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+6 ACIA) )
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353 356 LOADR
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16
blk/353
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16
blk/353
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(entry) ~ACIA
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AF PUSHqq,
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HL PUSHqq,
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DE PUSHqq,
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( Read our character from ACIA into our BUFIDX )
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ACIA_CTL INAn,
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0x01 ANDn, ( is ACIA rcv buf full? )
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IFNZ,
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( correct interrupt cause )
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( +2 == ACIAW> )
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ACIA_MEM 2+ LDHL(nn),
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( is it == to ACIAR>? )
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( +0 == ACIAR> )
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DE ACIA_MEM LDdd(nn),
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( carry cleared from ANDn above )
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DE SBCHLss, ( cont. )
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16
blk/354
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16
blk/354
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IFNZ, ( buffer full? )
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( no, continue )
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DE ADDHLss, ( restore ACIAW> )
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( buffer not full, let's write )
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ACIA_IO INAn,
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(HL) A LDrr,
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( advance W> )
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HL INCss,
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( +2 == ACIAW> )
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ACIA_MEM 2+ LD(nn)HL,
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( +6 == ACIA) )
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DE ACIA_MEM 6 + LDdd(nn),
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DE SUBHLss,
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( cont. )
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16
blk/356
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16
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IFZ, ( end of buffer reached? )
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( yes )
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( +4 == ACIA( )
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ACIA_MEM 4 + LDHL(nn),
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( +2 == ACIAW> )
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ACIA_MEM 2+ LD(nn)HL,
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THEN,
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THEN,
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THEN,
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DE POPqq,
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HL POPqq,
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AF POPqq,
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EI,
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RETI,
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14
blk/357
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14
blk/357
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0x20 CONSTANT ACIABUFSZ
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( Points to ACIA buf )
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: ACIA( [ ACIA_MEM 4 + LITN ] ;
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( Points to ACIA buf end )
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: ACIA) [ ACIA_MEM 6 + LITN ] ;
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( Read buf pointer. Pre-inc )
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: ACIAR> [ ACIA_MEM LITN ] ;
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( Write buf pointer. Post-inc )
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: ACIAW> [ ACIA_MEM 2 + LITN ] ;
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( This means that if W> == R>, buffer is full.
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If R>+1 == W>, buffer is empty. )
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358 360 LOADR
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16
blk/358
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16
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: ACIA$
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H@ DUP DUP ACIA( ! ACIAR> !
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1+ ACIAW> ! ( write index starts one position later )
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ACIABUFSZ ALLOT
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H@ ACIA) !
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( setup ACIA
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CR7 (1) - Receive Interrupt enabled
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CR6:5 (00) - RTS low, transmit interrupt disabled.
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CR4:2 (101) - 8 bits + 1 stop bit
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CR1:0 (10) - Counter divide: 64 )
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0b10010110 ACIA_CTL PC!
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( setup interrupt )
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0xc3 0x4e RAM+ C! ( c3==JP, 4e==INTJUMP )
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['] ~ACIA 0x4f RAM+ !
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(im1)
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;
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14
blk/359
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14
blk/359
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: KEY
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( inc then fetch )
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ACIAR> @ 1+ DUP ACIA) @ = IF
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DROP ACIA( @
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THEN
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( As long as R> == W>-1, it means that buffer is empty )
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BEGIN DUP ACIAW> @ = NOT UNTIL
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ACIAR> !
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ACIAR> @ C@
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;
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7
blk/360
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7
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: EMIT
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( As long at CTL bit 1 is low, we are transmitting. wait )
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BEGIN ACIA_CTL PC@ 0x02 AND UNTIL
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( The way is clear, go! )
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ACIA_IO PC!
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;
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60
drv/acia.z80
60
drv/acia.z80
@ -1,60 +0,0 @@
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( Save ACIA conf )
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ACIA_CTL
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: ACIA_CTL [ LITN ] ;
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ACIA_IO
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: ACIA_IO [ LITN ] ;
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ACIA_MEM
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: ACIA_MEM [ LITN ] ;
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( Memory layout
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+0 ACIAR>
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+2 ACIAW>
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+4 ACIA(
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+6 ACIA)
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)
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(entry) ~ACIA
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AF PUSHqq,
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HL PUSHqq,
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DE PUSHqq,
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( Read our character from ACIA into our BUFIDX )
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ACIA_CTL INAn,
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0x01 ANDn, ( is ACIA rcv buf full? )
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IFNZ,
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( correct interrupt cause )
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( +2 == ACIAW> )
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ACIA_MEM 2+ LDHL(nn),
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( is it == to ACIAR>? )
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( +0 == ACIAR> )
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DE ACIA_MEM LDdd(nn),
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( carry cleared from ANDn above )
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DE SBCHLss,
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IFNZ, ( buffer full? )
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( no, continue )
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DE ADDHLss, ( restore ACIAW> )
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( buffer not full, let's write )
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ACIA_IO INAn,
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(HL) A LDrr,
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( advance W> )
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HL INCss,
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( +2 == ACIAW> )
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ACIA_MEM 2+ LD(nn)HL,
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( +6 == ACIA) )
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DE ACIA_MEM 6 + LDdd(nn),
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DE SUBHLss,
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IFZ, ( end of buffer reached? )
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( yes )
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( +4 == ACIA( )
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ACIA_MEM 4 + LDHL(nn),
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( +2 == ACIAW> )
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ACIA_MEM 2+ LD(nn)HL,
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THEN,
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THEN,
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THEN,
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DE POPqq,
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HL POPqq,
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AF POPqq,
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EI,
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RETI,
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@ -6,7 +6,7 @@ STAGE2 = $(EDIR)/stage2
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EMUL = $(BASEDIR)/emul/hw/rc2014/classic
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EMUL = $(BASEDIR)/emul/hw/rc2014/classic
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BOOTSRCS = conf.fs \
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BOOTSRCS = conf.fs \
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$(EDIR)/xcomp.fs \
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$(EDIR)/xcomp.fs \
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$(BASEDIR)/drv/acia.z80 \
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drvz80.fs \
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$(BASEDIR)/drv/sdc.z80 \
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$(BASEDIR)/drv/sdc.z80 \
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$(FDIR)/icore.fs \
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$(FDIR)/icore.fs \
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$(EDIR)/stop.fs
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$(EDIR)/stop.fs
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1
recipes/rc2014/drvz80.fs
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1
recipes/rc2014/drvz80.fs
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352 LOAD ( acia.z80 )
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