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Copy ACIA driver to blkfs

We can get rid of acia.z80, but not of acia.fs yet, we still need it.
This commit is contained in:
Virgil Dupras 2020-04-23 12:42:41 -04:00
parent dd6ce1b8fe
commit a19376df6c
13 changed files with 132 additions and 62 deletions

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@ -3,7 +3,7 @@ MASTER INDEX
3 Usage 30 Dictionary 3 Usage 30 Dictionary
70 Implementation notes 100 Block editor 70 Implementation notes 100 Block editor
200 Z80 assembler 260 Cross compilation 200 Z80 assembler 260 Cross compilation
280 Z80 boot code 280 Z80 boot code 350 ACIA driver

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ACIA driver
Manage I/O from an asynchronous communication interface adapter
(ACIA). provides "EMIT" to put c char on the ACIA as well as
an input buffer. You have to call "~ACIA" on interrupt for
this module to work well.
CONFIGURATION
ACIA_CTL: IO port for the ACIA's control registers
ACIA_IO: IO port for the ACIA's data registers
ACIA_MEM: Address in memory that can be used variables shared
with ACIA's native words. 8 bytes used.
Load z80 words with "352 LOAD" and Forth words with "357 LOAD".

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( Save ACIA conf )
ACIA_CTL
: ACIA_CTL [ LITN ] ;
ACIA_IO
: ACIA_IO [ LITN ] ;
ACIA_MEM
: ACIA_MEM [ LITN ] ;
( Memory layout
+0 ACIAR>
+2 ACIAW>
+4 ACIA(
+6 ACIA) )
353 356 LOADR

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(entry) ~ACIA
AF PUSHqq,
HL PUSHqq,
DE PUSHqq,
( Read our character from ACIA into our BUFIDX )
ACIA_CTL INAn,
0x01 ANDn, ( is ACIA rcv buf full? )
IFNZ,
( correct interrupt cause )
( +2 == ACIAW> )
ACIA_MEM 2+ LDHL(nn),
( is it == to ACIAR>? )
( +0 == ACIAR> )
DE ACIA_MEM LDdd(nn),
( carry cleared from ANDn above )
DE SBCHLss, ( cont. )

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IFNZ, ( buffer full? )
( no, continue )
DE ADDHLss, ( restore ACIAW> )
( buffer not full, let's write )
ACIA_IO INAn,
(HL) A LDrr,
( advance W> )
HL INCss,
( +2 == ACIAW> )
ACIA_MEM 2+ LD(nn)HL,
( +6 == ACIA) )
DE ACIA_MEM 6 + LDdd(nn),
DE SUBHLss,
( cont. )

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IFZ, ( end of buffer reached? )
( yes )
( +4 == ACIA( )
ACIA_MEM 4 + LDHL(nn),
( +2 == ACIAW> )
ACIA_MEM 2+ LD(nn)HL,
THEN,
THEN,
THEN,
DE POPqq,
HL POPqq,
AF POPqq,
EI,
RETI,

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0x20 CONSTANT ACIABUFSZ
( Points to ACIA buf )
: ACIA( [ ACIA_MEM 4 + LITN ] ;
( Points to ACIA buf end )
: ACIA) [ ACIA_MEM 6 + LITN ] ;
( Read buf pointer. Pre-inc )
: ACIAR> [ ACIA_MEM LITN ] ;
( Write buf pointer. Post-inc )
: ACIAW> [ ACIA_MEM 2 + LITN ] ;
( This means that if W> == R>, buffer is full.
If R>+1 == W>, buffer is empty. )
358 360 LOADR

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: ACIA$
H@ DUP DUP ACIA( ! ACIAR> !
1+ ACIAW> ! ( write index starts one position later )
ACIABUFSZ ALLOT
H@ ACIA) !
( setup ACIA
CR7 (1) - Receive Interrupt enabled
CR6:5 (00) - RTS low, transmit interrupt disabled.
CR4:2 (101) - 8 bits + 1 stop bit
CR1:0 (10) - Counter divide: 64 )
0b10010110 ACIA_CTL PC!
( setup interrupt )
0xc3 0x4e RAM+ C! ( c3==JP, 4e==INTJUMP )
['] ~ACIA 0x4f RAM+ !
(im1)
;

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: KEY
( inc then fetch )
ACIAR> @ 1+ DUP ACIA) @ = IF
DROP ACIA( @
THEN
( As long as R> == W>-1, it means that buffer is empty )
BEGIN DUP ACIAW> @ = NOT UNTIL
ACIAR> !
ACIAR> @ C@
;

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: EMIT
( As long at CTL bit 1 is low, we are transmitting. wait )
BEGIN ACIA_CTL PC@ 0x02 AND UNTIL
( The way is clear, go! )
ACIA_IO PC!
;

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( Save ACIA conf )
ACIA_CTL
: ACIA_CTL [ LITN ] ;
ACIA_IO
: ACIA_IO [ LITN ] ;
ACIA_MEM
: ACIA_MEM [ LITN ] ;
( Memory layout
+0 ACIAR>
+2 ACIAW>
+4 ACIA(
+6 ACIA)
)
(entry) ~ACIA
AF PUSHqq,
HL PUSHqq,
DE PUSHqq,
( Read our character from ACIA into our BUFIDX )
ACIA_CTL INAn,
0x01 ANDn, ( is ACIA rcv buf full? )
IFNZ,
( correct interrupt cause )
( +2 == ACIAW> )
ACIA_MEM 2+ LDHL(nn),
( is it == to ACIAR>? )
( +0 == ACIAR> )
DE ACIA_MEM LDdd(nn),
( carry cleared from ANDn above )
DE SBCHLss,
IFNZ, ( buffer full? )
( no, continue )
DE ADDHLss, ( restore ACIAW> )
( buffer not full, let's write )
ACIA_IO INAn,
(HL) A LDrr,
( advance W> )
HL INCss,
( +2 == ACIAW> )
ACIA_MEM 2+ LD(nn)HL,
( +6 == ACIA) )
DE ACIA_MEM 6 + LDdd(nn),
DE SUBHLss,
IFZ, ( end of buffer reached? )
( yes )
( +4 == ACIA( )
ACIA_MEM 4 + LDHL(nn),
( +2 == ACIAW> )
ACIA_MEM 2+ LD(nn)HL,
THEN,
THEN,
THEN,
DE POPqq,
HL POPqq,
AF POPqq,
EI,
RETI,

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@ -6,7 +6,7 @@ STAGE2 = $(EDIR)/stage2
EMUL = $(BASEDIR)/emul/hw/rc2014/classic EMUL = $(BASEDIR)/emul/hw/rc2014/classic
BOOTSRCS = conf.fs \ BOOTSRCS = conf.fs \
$(EDIR)/xcomp.fs \ $(EDIR)/xcomp.fs \
$(BASEDIR)/drv/acia.z80 \ drvz80.fs \
$(BASEDIR)/drv/sdc.z80 \ $(BASEDIR)/drv/sdc.z80 \
$(FDIR)/icore.fs \ $(FDIR)/icore.fs \
$(EDIR)/stop.fs $(EDIR)/stop.fs

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352 LOAD ( acia.z80 )