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emul/z80: decouple SDC and SPI
My idea of plugging a RC2014 bridge directly onto a Sega Master System cartridge doesn't work. The SMS eats all I/O addr space, we can't use it. Therefore, this naive idea, in the emulator, of reusing sdc.c in sms.c as-is, doesn't work either. I'll have to find another way of communicating to a SPI device on the SMS. I'll probably do it through a controller port. Meanwhile, I need to decouple SPI from SDC in the emulator code so that I can reuse sdc.c. This is what is done here.
This commit is contained in:
parent
e31527f5ac
commit
97a46a7b9b
@ -1,6 +1,6 @@
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TARGETS = forth rc2014 sms ti84
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TARGETS = forth rc2014 sms ti84
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OBJS = emul.o z80.o
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OBJS = emul.o z80.o
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RC2014_OBJS = $(OBJS) sio.o acia.o sdc.o
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RC2014_OBJS = $(OBJS) sio.o acia.o sdc.o rc2014_spi.o
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SMS_OBJS = $(OBJS) sms_vdp.o sms_ports.o sms_pad.o ps2_kbd.o sdc.o
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SMS_OBJS = $(OBJS) sms_vdp.o sms_ports.o sms_pad.o ps2_kbd.o sdc.o
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TI84_OBJS = $(OBJS) t6a04.o ti84_kbd.o
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TI84_OBJS = $(OBJS) t6a04.o ti84_kbd.o
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CDIR = ../../cvm
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CDIR = ../../cvm
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@ -5,6 +5,7 @@
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typedef byte (*IORD) ();
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typedef byte (*IORD) ();
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typedef void (*IOWR) (byte data);
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typedef void (*IOWR) (byte data);
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typedef byte (*EXCH) (byte data);
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typedef struct {
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typedef struct {
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Z80Context cpu;
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Z80Context cpu;
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@ -15,6 +15,7 @@
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#include "acia.h"
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#include "acia.h"
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#include "sio.h"
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#include "sio.h"
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#include "sdc.h"
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#include "sdc.h"
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#include "rc2014_spi.h"
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#define RAMSTART 0x8000
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#define RAMSTART 0x8000
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#define ACIA_CTL_PORT 0x80
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#define ACIA_CTL_PORT 0x80
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@ -29,6 +30,7 @@ bool use_sio = false;
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static ACIA acia;
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static ACIA acia;
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static SIO sio;
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static SIO sio;
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static SDC sdc;
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static SDC sdc;
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static SPI spi;
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static uint8_t iord_acia_ctl()
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static uint8_t iord_acia_ctl()
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{
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{
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@ -70,26 +72,28 @@ static void iowr_sio_data(uint8_t val)
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sio_adata_wr(&sio, val);
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sio_adata_wr(&sio, val);
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}
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}
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static uint8_t iord_sdc_spi()
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static uint8_t iord_spi()
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{
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{
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return sdc_spi_rd(&sdc);
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return spi_rd(&spi);
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}
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}
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static void iowr_sdc_spi(uint8_t val)
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static void iowr_spi(uint8_t val)
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{
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{
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sdc_spi_wr(&sdc, val);
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spi_wr(&spi, val);
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}
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}
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byte spix_sdc(byte val) { return sdc_spix(&sdc, val); }
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// in emulation, exchanges are always instantaneous, so we
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// in emulation, exchanges are always instantaneous, so we
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// always report as ready.
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// always report as ready.
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static uint8_t iord_sdc_ctl()
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static uint8_t iord_spi_ctl()
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{
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{
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return 0;
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return 0;
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}
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}
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static void iowr_sdc_ctl(uint8_t val)
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static void iowr_spi_ctl(uint8_t val)
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{
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{
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sdc_ctl_wr(&sdc, val);
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spi_ctl_wr(&spi, val);
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}
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}
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static bool has_irq()
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static bool has_irq()
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@ -134,6 +138,7 @@ int main(int argc, char *argv[])
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acia_init(&acia);
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acia_init(&acia);
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sio_init(&sio);
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sio_init(&sio);
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sdc_init(&sdc);
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sdc_init(&sdc);
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spi_init(&spi, spix_sdc);
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while ((ch = getopt(argc, argv, "sc:")) != -1) {
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while ((ch = getopt(argc, argv, "sc:")) != -1) {
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switch (ch) {
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switch (ch) {
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@ -198,10 +203,10 @@ int main(int argc, char *argv[])
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m->iowr[ACIA_CTL_PORT] = iowr_acia_ctl;
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m->iowr[ACIA_CTL_PORT] = iowr_acia_ctl;
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m->iowr[ACIA_DATA_PORT] = iowr_acia_data;
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m->iowr[ACIA_DATA_PORT] = iowr_acia_data;
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}
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}
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m->iord[SDC_SPI] = iord_sdc_spi;
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m->iord[SDC_SPI] = iord_spi;
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m->iowr[SDC_SPI] = iowr_sdc_spi;
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m->iowr[SDC_SPI] = iowr_spi;
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m->iord[SDC_CTL] = iord_sdc_ctl;
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m->iord[SDC_CTL] = iord_spi_ctl;
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m->iowr[SDC_CTL] = iowr_sdc_ctl;
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m->iowr[SDC_CTL] = iowr_spi_ctl;
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char tosend = 0;
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char tosend = 0;
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while (emul_step()) {
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while (emul_step()) {
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28
emul/z80/rc2014_spi.c
Normal file
28
emul/z80/rc2014_spi.c
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@ -0,0 +1,28 @@
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#include "rc2014_spi.h"
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void spi_init(SPI *spi, EXCH spixfn)
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{
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spi->selected = false;
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spi->resp = 0xff;
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spi->spixfn = spixfn;
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}
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// TODO: for now, any nonzero value enables the SPI. To allow
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// emulation of systems with multi-devices SPI relay, change
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// this.
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void spi_ctl_wr(SPI *spi, byte val)
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{
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spi->selected = val;
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}
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void spi_wr(SPI *spi, byte val)
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{
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if (spi->selected) {
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spi->resp = spi->spixfn(val);
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}
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}
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byte spi_rd(SPI *spi)
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{
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return spi->selected ? spi->resp : 0xff;
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}
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17
emul/z80/rc2014_spi.h
Normal file
17
emul/z80/rc2014_spi.h
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@ -0,0 +1,17 @@
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#include "emul.h"
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/* Emulates a SPI relay designed for the RC2014, enabled by poking on the CTL
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port, then allowing a SPI exchange by writing to, then reading from, the
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data port.
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*/
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typedef struct {
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bool selected;
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byte resp;
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EXCH spixfn;
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} SPI;
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void spi_init(SPI *spi, EXCH spixfn);
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void spi_ctl_wr(SPI *spi, byte val);
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void spi_wr(SPI *spi, byte val);
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byte spi_rd(SPI *spi);
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@ -13,47 +13,34 @@ static uint16_t crc16(uint16_t crc, uint8_t data)
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void sdc_init(SDC *sdc)
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void sdc_init(SDC *sdc)
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{
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{
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sdc->selected = false;
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sdc->initstat = 0;
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sdc->initstat = 0;
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sdc->recvidx = 0;
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sdc->recvidx = 0;
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sdc->sendidx = -1;
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sdc->sendidx = -1;
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sdc->resp = 0xff;
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sdc->fp = NULL;
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sdc->fp = NULL;
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sdc->cmd17bytes = -1;
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sdc->cmd17bytes = -1;
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sdc->cmd24bytes = -2;
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sdc->cmd24bytes = -2;
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}
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}
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// TODO: for now, any nonzero value enables the SDC. To allow
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byte sdc_spix(SDC *sdc, byte val)
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// emulation of systems with multi-devices SPI relay, change
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// this.
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void sdc_ctl_wr(SDC *sdc, uint8_t val)
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{
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{
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sdc->selected = val;
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byte resp = 0xff;
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}
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void sdc_spi_wr(SDC *sdc, uint8_t val)
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{
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if (!sdc->selected) {
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return;
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}
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sdc->resp = 0xff;
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if (sdc->initstat < 8) {
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if (sdc->initstat < 8) {
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// not woken yet.
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// not woken yet.
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sdc->initstat++;
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sdc->initstat++;
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return;
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return resp;
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}
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}
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if (sdc->sendidx >= 0) {
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if (sdc->sendidx >= 0) {
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sdc->resp = sdc->sendbuf[sdc->sendidx++];
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resp = sdc->sendbuf[sdc->sendidx++];
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if (sdc->sendidx == 5) {
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if (sdc->sendidx == 5) {
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sdc->sendidx = -1;
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sdc->sendidx = -1;
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}
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}
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return;
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return resp;
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}
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}
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if (sdc->cmd17bytes >= 0) {
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if (sdc->cmd17bytes >= 0) {
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if (sdc->fp) {
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if (sdc->fp) {
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sdc->resp = getc(sdc->fp);
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resp = getc(sdc->fp);
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}
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}
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sdc->crc16 = crc16(sdc->crc16, sdc->resp);
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sdc->crc16 = crc16(sdc->crc16, resp);
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sdc->cmd17bytes++;
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sdc->cmd17bytes++;
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if (sdc->cmd17bytes == 512) {
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if (sdc->cmd17bytes == 512) {
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sdc->sendbuf[3] = sdc->crc16 >> 8;
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sdc->sendbuf[3] = sdc->crc16 >> 8;
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@ -61,12 +48,12 @@ void sdc_spi_wr(SDC *sdc, uint8_t val)
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sdc->sendidx = 3;
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sdc->sendidx = 3;
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sdc->cmd17bytes = -1;
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sdc->cmd17bytes = -1;
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}
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}
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return;
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return resp;
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}
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}
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if (sdc->cmd24bytes == -1) {
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if (sdc->cmd24bytes == -1) {
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if (val == 0xff) {
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if (val == 0xff) {
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// it's ok to receive idle bytes before the data token.
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// it's ok to receive idle bytes before the data token.
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return;
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return resp;
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}
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}
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if (val == 0xfe) {
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if (val == 0xfe) {
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// data token, good
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// data token, good
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@ -75,7 +62,7 @@ void sdc_spi_wr(SDC *sdc, uint8_t val)
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// something is wrong, cancel cmd24
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// something is wrong, cancel cmd24
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sdc->cmd24bytes = -2;
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sdc->cmd24bytes = -2;
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}
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}
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return;
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return resp;
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}
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}
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if (sdc->cmd24bytes >= 0) {
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if (sdc->cmd24bytes >= 0) {
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if (sdc->cmd24bytes < 512) {
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if (sdc->cmd24bytes < 512) {
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@ -102,16 +89,16 @@ void sdc_spi_wr(SDC *sdc, uint8_t val)
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sdc->cmd24bytes = -3;
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sdc->cmd24bytes = -3;
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}
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}
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sdc->cmd24bytes++;
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sdc->cmd24bytes++;
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return;
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return resp;
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}
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}
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if ((sdc->recvidx == 0) && ((val > 0x7f) || (val < 0x40))) {
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if ((sdc->recvidx == 0) && ((val > 0x7f) || (val < 0x40))) {
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// not a command
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// not a command
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return;
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return resp;
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}
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}
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sdc->recvbuf[sdc->recvidx++] = val;
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sdc->recvbuf[sdc->recvidx++] = val;
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if (sdc->recvidx < 6) {
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if (sdc->recvidx < 6) {
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// incomplete command
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// incomplete command
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return;
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return resp;
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}
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}
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// Command complete
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// Command complete
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val &= 0x3f;
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val &= 0x3f;
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@ -128,7 +115,7 @@ void sdc_spi_wr(SDC *sdc, uint8_t val)
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sdc->sendbuf[4] = 0x01;
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sdc->sendbuf[4] = 0x01;
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sdc->sendidx = 4;
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sdc->sendidx = 4;
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}
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}
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return;
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return resp;
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}
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}
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if (sdc->initstat == 9) {
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if (sdc->initstat == 9) {
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// At this stage, we're expecting CMD8 with 0x1aa arg2
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// At this stage, we're expecting CMD8 with 0x1aa arg2
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@ -143,7 +130,7 @@ void sdc_spi_wr(SDC *sdc, uint8_t val)
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} else {
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} else {
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sdc-> initstat = 8;
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sdc-> initstat = 8;
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}
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}
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return;
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return resp;
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}
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}
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if (sdc->initstat == 10) {
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if (sdc->initstat == 10) {
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// At this stage, we're expecting CMD55
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// At this stage, we're expecting CMD55
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@ -154,7 +141,7 @@ void sdc_spi_wr(SDC *sdc, uint8_t val)
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} else {
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} else {
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sdc->initstat = 8;
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sdc->initstat = 8;
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}
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}
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return;
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return resp;
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}
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}
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if (sdc->initstat == 11) {
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if (sdc->initstat == 11) {
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// At this stage, we're expecting CMD41
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// At this stage, we're expecting CMD41
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@ -165,7 +152,7 @@ void sdc_spi_wr(SDC *sdc, uint8_t val)
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} else {
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} else {
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sdc->initstat = 8;
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sdc->initstat = 8;
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}
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}
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return;
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return resp;
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}
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}
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// We have a fully initialized card.
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// We have a fully initialized card.
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if (cmd == 17) {
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if (cmd == 17) {
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@ -178,7 +165,7 @@ void sdc_spi_wr(SDC *sdc, uint8_t val)
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sdc->sendidx = 3;
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sdc->sendidx = 3;
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sdc->cmd17bytes = 0;
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sdc->cmd17bytes = 0;
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sdc->crc16 = 0;
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sdc->crc16 = 0;
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return;
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return resp;
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}
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}
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if (cmd == 24) {
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if (cmd == 24) {
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if (sdc->fp) {
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if (sdc->fp) {
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@ -188,17 +175,10 @@ void sdc_spi_wr(SDC *sdc, uint8_t val)
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sdc->sendidx = 4;
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sdc->sendidx = 4;
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sdc->cmd24bytes = -1;
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sdc->cmd24bytes = -1;
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sdc->crc16 = 0;
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sdc->crc16 = 0;
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return;
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return resp;
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}
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}
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// Simulate success for any unknown command.
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// Simulate success for any unknown command.
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sdc->sendbuf[4] = 0x00;
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sdc->sendbuf[4] = 0x00;
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sdc->sendidx = 4;
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sdc->sendidx = 4;
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}
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return resp;
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uint8_t sdc_spi_rd(SDC *sdc)
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{
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if (!sdc->selected) {
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return 0xff;
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}
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return sdc->resp;
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}
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}
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@ -1,24 +1,19 @@
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#include <stdint.h>
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#include "emul.h"
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#include <stdbool.h>
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typedef struct {
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typedef struct {
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bool selected;
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// Initialization status. 0 == not woken 8 == woken 9 == CMD0 received
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// Initialization status. 0 == not woken 8 == woken 9 == CMD0 received
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// 10 == CMD8 received, 11 == CMD55 received, 12 == CMD41 received (fully
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// 10 == CMD8 received, 11 == CMD55 received, 12 == CMD41 received (fully
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// initialized).
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// initialized).
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unsigned int initstat;
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unsigned int initstat;
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// We receive commands into this buffer.
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// We receive commands into this buffer.
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uint8_t recvbuf[6];
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byte recvbuf[6];
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// Where the next SPI byte should be stored in recvbuf.
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// Where the next SPI byte should be stored in recvbuf.
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unsigned int recvidx;
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unsigned int recvidx;
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// Buffer to the arguments for a response
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// Buffer to the arguments for a response
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uint8_t sendbuf[5];
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byte sendbuf[5];
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// Index of the next byte from sendbuf we should return. If -1, buffer is
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// Index of the next byte from sendbuf we should return. If -1, buffer is
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// empty.
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// empty.
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int sendidx;
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int sendidx;
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// One byte response. When all other response buffers are empty, return
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// this.
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uint8_t resp;
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// File used for contents read/write
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// File used for contents read/write
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||||||
FILE *fp;
|
FILE *fp;
|
||||||
// number of bytes read into the current CMD17. -1 means no CMD17 active.
|
// number of bytes read into the current CMD17. -1 means no CMD17 active.
|
||||||
@ -31,6 +26,4 @@ typedef struct {
|
|||||||
} SDC;
|
} SDC;
|
||||||
|
|
||||||
void sdc_init(SDC *sdc);
|
void sdc_init(SDC *sdc);
|
||||||
void sdc_ctl_wr(SDC *sdc, uint8_t val);
|
byte sdc_spix(SDC *sdc, byte val);
|
||||||
void sdc_spi_wr(SDC *sdc, uint8_t val);
|
|
||||||
uint8_t sdc_spi_rd(SDC *sdc);
|
|
||||||
|
@ -90,7 +90,8 @@ static void iowr_ports_ctl(uint8_t val)
|
|||||||
ports_ctl_wr(&ports, val);
|
ports_ctl_wr(&ports, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
static uint8_t iord_sdc_spi()
|
// TODO: re-add as controller-based SPI
|
||||||
|
/* static uint8_t iord_sdc_spi()
|
||||||
{
|
{
|
||||||
return sdc_spi_rd(&sdc);
|
return sdc_spi_rd(&sdc);
|
||||||
}
|
}
|
||||||
@ -110,7 +111,7 @@ static uint8_t iord_sdc_ctl()
|
|||||||
static void iowr_sdc_ctl(uint8_t val)
|
static void iowr_sdc_ctl(uint8_t val)
|
||||||
{
|
{
|
||||||
sdc_ctl_wr(&sdc, val);
|
sdc_ctl_wr(&sdc, val);
|
||||||
}
|
}*/
|
||||||
|
|
||||||
void create_window()
|
void create_window()
|
||||||
{
|
{
|
||||||
@ -356,10 +357,12 @@ int main(int argc, char *argv[])
|
|||||||
m->iowr[VDP_CMD_PORT] = iowr_vdp_cmd;
|
m->iowr[VDP_CMD_PORT] = iowr_vdp_cmd;
|
||||||
m->iowr[VDP_DATA_PORT] = iowr_vdp_data;
|
m->iowr[VDP_DATA_PORT] = iowr_vdp_data;
|
||||||
m->iowr[PORTS_CTL_PORT] = iowr_ports_ctl;
|
m->iowr[PORTS_CTL_PORT] = iowr_ports_ctl;
|
||||||
|
/* TODO: re-add
|
||||||
m->iord[SDC_SPI] = iord_sdc_spi;
|
m->iord[SDC_SPI] = iord_sdc_spi;
|
||||||
m->iowr[SDC_SPI] = iowr_sdc_spi;
|
m->iowr[SDC_SPI] = iowr_sdc_spi;
|
||||||
m->iord[SDC_CTL] = iord_sdc_ctl;
|
m->iord[SDC_CTL] = iord_sdc_ctl;
|
||||||
m->iowr[SDC_CTL] = iowr_sdc_ctl;
|
m->iowr[SDC_CTL] = iowr_sdc_ctl;
|
||||||
|
*/
|
||||||
|
|
||||||
conn = xcb_connect(NULL, NULL);
|
conn = xcb_connect(NULL, NULL);
|
||||||
screen = xcb_setup_roots_iterator(xcb_get_setup(conn)).data;
|
screen = xcb_setup_roots_iterator(xcb_get_setup(conn)).data;
|
||||||
|
@ -1,13 +1,15 @@
|
|||||||
0xff00 CONSTANT RS_ADDR 0xfffa CONSTANT PS_ADDR
|
0xff00 CONSTANT RS_ADDR 0xfffa CONSTANT PS_ADDR
|
||||||
RS_ADDR 0x80 - CONSTANT SYSVARS
|
RS_ADDR 0x80 - CONSTANT SYSVARS
|
||||||
0x8000 CONSTANT HERESTART
|
0x8000 CONSTANT HERESTART
|
||||||
|
4 CONSTANT SPI_DATA 5 CONSTANT SPI_CTL 1 CONSTANT SDC_DEVID
|
||||||
602 LOAD ( acia decl )
|
602 LOAD ( acia decl )
|
||||||
5 LOAD ( z80 assembler )
|
5 LOAD ( z80 assembler )
|
||||||
262 LOAD ( xcomp ) 282 LOAD ( boot.z80.decl )
|
262 LOAD ( xcomp ) 282 LOAD ( boot.z80.decl )
|
||||||
270 LOAD ( xcomp overrides ) 283 335 LOADR ( boot.z80 )
|
270 LOAD ( xcomp overrides ) 283 335 LOADR ( boot.z80 )
|
||||||
353 LOAD ( xcomp core low ) 603 605 LOADR ( acia )
|
353 LOAD ( xcomp core low ) 603 605 LOADR ( acia )
|
||||||
|
419 LOAD 423 436 LOADR
|
||||||
390 LOAD ( xcomp core high )
|
390 LOAD ( xcomp core high )
|
||||||
(entry) _
|
(entry) _
|
||||||
( Update LATEST )
|
( Update LATEST )
|
||||||
PC ORG @ 8 + !
|
PC ORG @ 8 + !
|
||||||
," ACIA$ " EOT,
|
," ACIA$ BLK$ " EOT,
|
||||||
|
Loading…
Reference in New Issue
Block a user