rc2014: add a declaration part to ACIA drivers

Driver configuration don't need their own words at runtime, we only
need to compile them as literals when compiling words.

Now that we have this "declaration blocks" pattern emerging, it
seems like a good idea to take advantage of this in drivers, both
for simplifying the xcomp unit and to make final binary slimmer.

blk/581

@@ -2,15 +2,11 @@ ACIA driver
 
 Manage I/O from an asynchronous communication interface adapter
 (ACIA). provides "(emit)" to put c char on the ACIA as well as
-an input buffer from which a provided "(key)" reads. You have
+an input buffer from which a provided "(key)" reads. This driver
-to call "~ACIA" on interrupt for this module to work well.
+installs an interrupt handler at RST38 to handle RX.      
 
-CONFIGURATION
+To use, begin by loading declarations (B582) before xcomp is    
+loaded. These declarations provide default values for ports and 
+memory offsets that you can override. See B582.
 
-ACIA_CTL: IO port for the ACIA's control registers
+Then, in the driver part, load range 583-588.
-ACIA_IO: IO port for the ACIA's data registers
-ACIA_MEM: Address in memory that can be used variables shared
-          with ACIA's native words. 8 bytes used.
-
-The whole driver is cross-compilable and is loaded with
-"582 LOAD"

blk/582

@@ -1,7 +1,15 @@
-( Memory layout
+0x80 CONSTANT ACIA_CTL ( IO port for ACIA's control register )
-  +0 ACIAR>
+0x81 CONSTANT ACIA_IO ( IO port for ACIA's data registers )
-  +2 ACIAW>
+( Address in memory that can be used variables shared
-  +4 ACIA(
+  with ACIA's native words. 8 bytes used. )
-  +6 ACIA) )
+CREATE ACIA_MEM RAMSTART 0x70 + ,
-
+( Points to ACIA buf )
-1 6 LOADR+
+: ACIA( ACIA_MEM @ 4 + ;
+( Points to ACIA buf end )
+: ACIA) ACIA_MEM @ 6 + ;
+( Read buf pointer. Pre-inc )
+: ACIAR> ACIA_MEM @ ;
+( Write buf pointer. Post-inc )
+: ACIAW> ACIA_MEM @ 2+ ;
+( This means that if W> == R>, buffer is full.
+  If R>+1 == W>, buffer is empty. )

blk/583

@@ -5,10 +5,9 @@
     0x01 ANDi,   ( is ACIA rcv buf full? )
     IFNZ,
         ( correct interrupt cause )
-        ( +2 == ACIAW> )
+        ACIAW> LDHL(n),
-        ACIA_MEM 2+ LDHL(n),
         ( is it == to ACIAR>? )
         ( +0 == ACIAR> )
-        DE ACIA_MEM LDdd(n),
+        DE ACIAR> LDdd(n),
         ( carry cleared from ANDi above )
         DE SBCHLd,                                    ( cont. )

blk/584

@@ -6,10 +6,8 @@
             (HL) A LDrr,
             ( advance W> )
             HL INCd,
-            ( +2 == ACIAW> )
+            ACIAW> LD(n)HL,
-            ACIA_MEM 2+ LD(n)HL,
+            DE ACIA) LDdd(n),
-            ( +6 == ACIA) )
-            DE ACIA_MEM 6 + LDdd(n),
             DE SUBHLd,
 
 

blk/585

@@ -1,9 +1,7 @@
             IFZ, ( end of buffer reached? )
                 ( yes )
-                ( +4 == ACIA( )
+                ACIA( LDHL(n),
-                ACIA_MEM 4 + LDHL(n),
+                ACIAW> LD(n)HL,
-                ( +2 == ACIAW> )
-                ACIA_MEM 2+ LD(n)HL,
             THEN,
         THEN,
     THEN,

blk/586

@@ -1,10 +0,0 @@
-( Points to ACIA buf )
-: ACIA( [ ACIA_MEM 4 + LITN ] ;
-( Points to ACIA buf end )
-: ACIA) [ ACIA_MEM 6 + LITN ] ;
-( Read buf pointer. Pre-inc )
-: ACIAR> [ ACIA_MEM LITN ] ;
-( Write buf pointer. Post-inc )
-: ACIAW> [ ACIA_MEM 2 + LITN ] ;
-( This means that if W> == R>, buffer is full.
-  If R>+1 == W>, buffer is empty. )

blk/587

@@ -1,12 +1,12 @@
 : (key)
     ( inc then fetch )
-    ACIAR> @ 1+ DUP ACIA) @ = IF
+    [ ACIAR> LITN ] @ 1+ DUP [ ACIA) LITN ] @ = IF
-        DROP ACIA( @
+        DROP [ ACIA( LITN ] @
     THEN
     ( As long as R> == W>-1, it means that buffer is empty )
-    BEGIN DUP ACIAW> @ = NOT UNTIL
+    BEGIN DUP [ ACIAW> LITN ] @ = NOT UNTIL
-    ACIAR> !
+    [ ACIAR> LITN ] !
-    ACIAR> @ C@
+    [ ACIAR> LITN ] @ C@
 ;
 : (emit)
     ( As long at CTL bit 1 is low, we are transmitting. wait )

blk/588

@@ -1,8 +1,8 @@
 : ACIA$
-    H@ DUP DUP ACIA( ! ACIAR> !
+    H@ DUP DUP [ ACIA( LITN ] ! [ ACIAR> LITN ] !
-    1+ ACIAW> !  ( write index starts one position later )
+    1+ [ ACIAW> LITN ] ! ( write index starts one pos later )
     0x20 ( buffer size ) ALLOT
-    H@ ACIA) !
+    H@ [ ACIA) LITN ] !
 ( setup ACIA
   CR7 (1) - Receive Interrupt enabled
   CR6:5 (00) - RTS low, transmit interrupt disabled.

blk/618

@@ -1,13 +1,12 @@
 0x8000 CONSTANT RAMSTART
 0xff00 CONSTANT RS_ADDR        0xfffa CONSTANT PS_ADDR
-0x80   CONSTANT ACIA_CTL       0x81   CONSTANT ACIA_IO
 4      CONSTANT SDC_SPI
 5      CONSTANT SDC_CSLOW      6      CONSTANT SDC_CSHIGH
-RAMSTART 0x70 + CONSTANT ACIA_MEM
+582 LOAD  ( acia decl )
 212 LOAD  ( z80 assembler )
 262 LOAD  ( xcomp )            282 LOAD  ( boot.z80.decl )
 270 LOAD  ( xcomp overrides )  283 335 LOADR ( boot.z80 )
-353 LOAD  ( xcomp core low )   582 LOAD  ( acia )
+353 LOAD  ( xcomp core low )   583 588 LOADR ( acia )
 380 LOAD  ( xcomp core high )
 (entry) _
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