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addHL and subHL affect flags, and are smaller

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Most importantly, addHL and subHL now affect the flags as you would expect from a 16 bit addition/subtraction. This seems like it'd be preferred behaviour, however I realise any code relying on it not affecting flags would break. One byte saved in addHL, and two bytes saved in subHL. Due to the branching nature of the original code, it's difficult to compare speeds, subHL is either 1 or 6 cycles faster depending on branching, and addHL is between -1 and 3 cycles faster. If the chance of a carry is 50%, addHL is expected to be a cycle faster, but for a chance of carry below 25% (so a < 0x40) this will be up to a cycle slower.
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Clanmaster21 2019-10-10 21:07:23 +01:00 committed by GitHub
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commit 8b174acd0e
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1 changed files with 14 additions and 19 deletions
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33
kernel/core.asm
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@ -52,29 +52,24 @@ intoIX:
pop ix
ret
; add the value of A into HL
; add the value of A into HL, affecting flags like an ordinary addition
addHL:
push af
add a, l
jr nc, .end ; no carry? skip inc
inc h
.end:
ld l, a
pop af
push de
ld d, 0
ld e, a
add hl, de
pop de
ret
; subtract the value of A from HL
; subtract the value of A from HL, affecting flags like an ordinary subtraction
subHL:
push af
; To avoid having to swap L and A, we sub "backwards", that is, we add
; a NEGated value. This means that the carry flag is inverted
neg
add a, l
jr c, .end ; if carry, no carry. :)
dec h
.end:
ld l, a
pop af
push de
ld d, 0
ld e, a
or a ;reset carry flag
sbc hl, de ;There is no 'sub hl, de', so we must use sbc
pop de
ret
; Compare HL with DE and sets Z and C in the same way as a regular cp X where