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rc2014: aaalmost there...

Red 5 standing by.
This commit is contained in:
Virgil Dupras 2020-04-04 17:07:35 -04:00
parent d1f4dc0ca3
commit 7b42bbde27
5 changed files with 29 additions and 19 deletions

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@ -9,21 +9,12 @@ CONFIGURATION
ACIA_CTL: IO port for the ACIA's control registers ACIA_CTL: IO port for the ACIA's control registers
ACIA_IO: IO port for the ACIA's data registers ACIA_IO: IO port for the ACIA's data registers
ACIA_MEM: Address in memory that can be used variables shared
with ACIA's native words. 8 bytes used.
) )
0x20 CONSTANT ACIABUFSZ 0x20 CONSTANT ACIABUFSZ
( Points to ACIA buf )
(sysv) ACIA(
( Points to ACIA buf end )
(sysv) ACIA)
( Read buf pointer. Pre-inc )
(sysv) ACIAR>
( Write buf pointer. Post-inc )
(sysv) ACIAW>
( This means that if W> == R>, buffer is full.
If R>+1 == W>, buffer is empty. )
: ACIA$ : ACIA$
H@ DUP DUP ACIA( ! ACIAR> ! H@ DUP DUP ACIA( ! ACIAR> !
1 + ACIAW> ! ( write index starts one position later ) 1 + ACIAW> ! ( write index starts one position later )
@ -48,8 +39,9 @@ ACIA_IO: IO port for the ACIA's data registers
( As long as R> == W>-1, it means that buffer is empty ) ( As long as R> == W>-1, it means that buffer is empty )
BEGIN ACIAR> @ 1 + ACIAW> @ = NOT UNTIL BEGIN ACIAR> @ 1 + ACIAW> @ = NOT UNTIL
ACIAR> @ C@ ( inc then fetch )
1 ACIAR> +! 1 ACIAR> +!
ACIAR> @ C@
; ;
: EMIT : EMIT

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@ -1,8 +1,18 @@
( Save ACIA ports from conf ) ( Save ACIA conf )
ACIA_CTL ACIA_CTL
: ACIA_CTL [ LITN ] ; : ACIA_CTL [ LITN ] ;
ACIA_IO ACIA_IO
: ACIA_IO [ LITN ] ; : ACIA_IO [ LITN ] ;
( Points to ACIA buf )
: ACIA( [ ACIA_MEM 4 + LITN ] ;
( Points to ACIA buf end )
: ACIA) [ ACIA_MEM 6 + LITN ] ;
( Read buf pointer. Pre-inc )
: ACIAR> [ ACIA_MEM LITN ] ;
( Write buf pointer. Post-inc )
: ACIAW> [ ACIA_MEM 2 + LITN ] ;
( This means that if W> == R>, buffer is full.
If R>+1 == W>, buffer is empty. )
(entry) ~ACIA (entry) ~ACIA
AF PUSHqq, AF PUSHqq,
@ -14,26 +24,28 @@ ACIA_IO
0x01 ANDn, ( is ACIA rcv buf full? ) 0x01 ANDn, ( is ACIA rcv buf full? )
JRZ, L2 FWR ( end, no, wrong interrupt cause. ) JRZ, L2 FWR ( end, no, wrong interrupt cause. )
ACIAW> @ LDHL(nn), ACIAW> LDHL(nn),
( is it == to ACIAR>? ) ( is it == to ACIAR>? )
DE ACIAR> @ LDdd(nn), DE ACIAR> LDdd(nn),
( carry cleared from ANDn above ) ( carry cleared from ANDn above )
DE SBCHLss, DE SBCHLss,
JRZ, L3 FWR ( end, buffer full ) JRZ, L3 FWR ( end, buffer full )
DE ADDHLss, ( restore ACIAW> )
( buffer not full, let's write ) ( buffer not full, let's write )
ACIA_IO INAn, ACIA_IO INAn,
(HL) A LDrr, (HL) A LDrr,
( advance W> ) ( advance W> )
HL INCss, HL INCss,
DE ACIAR) @ LDdd(nn), ACIAW> LD(nn)HL,
DE ACIA) @ LDdd(nn),
DE SUBHLss, DE SUBHLss,
JRNZ, L4 FWR ( skip ) JRNZ, L4 FWR ( skip )
( end of buffer reached ) ( end of buffer reached )
ACIA( @ LDHL(nn), ACIA( @ LDHL(nn),
ACIAW> LD(nn)HL,
L4 FSET ( skip ) L4 FSET ( skip )
ACIAW> @ LD(nn)HL,
L3 FSET L2 FSET ( end ) L3 FSET L2 FSET ( end )
DE POPqq, DE POPqq,

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@ -115,7 +115,12 @@ those slots...) in boot binaries are made to jump to this address. If you use
one of those slots for an interrupt, write a jump to the appropriate offset in one of those slots for an interrupt, write a jump to the appropriate offset in
that RAM location. that RAM location.
SYSTEM SCRATCHPAD is reserved for temporary system storage. SYSTEM SCRATCHPAD is reserved for temporary system storage or can be reserved
by low-level drivers. These are the current usages of this space throughout the
project:
* 0x51-0x53: (c<) pointer during in-memory initialization (see below)
* 0x53-0x5b: ACIA buffer pointers in RC2014 recipes.
*** Initialization sequence *** Initialization sequence

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@ -2,4 +2,5 @@
0xf000 CONSTANT RS_ADDR 0xf000 CONSTANT RS_ADDR
0x80 CONSTANT ACIA_CTL 0x80 CONSTANT ACIA_CTL
0x81 CONSTANT ACIA_IO 0x81 CONSTANT ACIA_IO
RAMSTART 0x53 + CONSTANT ACIA_MEM

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@ -3,7 +3,7 @@
(c<$) (c<$)
." Collapse OS" LF ." Collapse OS" LF
( 0c == CINPTR ) ( 0c == CINPTR )
' (c<) 0x0c RAM+ ! ['] (c<) 0x0c RAM+ !
; ;
INIT INIT