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rc2014: we're almost getting there...

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This commit is contained in:
Virgil Dupras 2020-04-04 10:31:22 -04:00
parent 435b4f452c
commit 5be9b9cd3e
5 changed files with 68 additions and 54 deletions
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44
drv/acia.fs
View File

@ -24,44 +24,6 @@ ACIA_IO: IO port for the ACIA's data registers
( This means that if W> == R>, buffer is full.
If R>+1 == W>, buffer is empty. )
(entry) ~ACIA
AF PUSHqq,
HL PUSHqq,
DE PUSHqq,
( Read our character from ACIA into our BUFIDX )
ACIA_CTL INAn,
0x01 ANDn, ( is ACIA rcv buf full? )
JRZ, L2 FWR ( end, no, wrong interrupt cause. )
ACIAW> @ LDHL(nn),
( is it == to ACIAR>? )
DE ACIAR> @ LDdd(nn),
( carry cleared from ANDn above )
DE SBCHLss,
JRZ, L3 FWR ( end, buffer full )
( buffer not full, let's write )
ACIA_IO INAn,
(HL) A LDrr,
( advance W> )
HL INCss,
DE ACIAR) @ LDdd(nn),
DE SUBHLss,
JRNZ, L4 FWR ( skip )
( end of buffer reached )
ACIA( @ LDHL(nn),
L4 FSET ( skip )
ACIAW> @ LD(nn)HL,
L3 FSET L2 FSET ( end )
DE POPqq,
HL POPqq,
AF POPqq,
EI,
RETI,
: ACIA$
H@ DUP DUP ACIA( ! ACIAR> !
1 + ACIAW> ! ( write index starts one position later )
@ -76,9 +38,9 @@ L3 FSET L2 FSET ( end )
0b10010110 ACIA_CTL PC!
( setup interrupt )
( 51 == INTJUMP )
0xc3 0x51 RAM+ C! ( JP upcode )
['] ~ACIA 0x52 RAM+ !
( 4e == INTJUMP )
0xc3 0x4e RAM+ C! ( JP upcode )
['] ~ACIA 0x4f RAM+ !
(im1)
;

43
drv/acia.z80 Normal file
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@ -0,0 +1,43 @@
( Save ACIA ports from conf )
ACIA_CTL
: ACIA_CTL [ LITN ] ;
ACIA_IO
: ACIA_IO [ LITN ] ;
(entry) ~ACIA
AF PUSHqq,
HL PUSHqq,
DE PUSHqq,
( Read our character from ACIA into our BUFIDX )
ACIA_CTL INAn,
0x01 ANDn, ( is ACIA rcv buf full? )
JRZ, L2 FWR ( end, no, wrong interrupt cause. )
ACIAW> @ LDHL(nn),
( is it == to ACIAR>? )
DE ACIAR> @ LDdd(nn),
( carry cleared from ANDn above )
DE SBCHLss,
JRZ, L3 FWR ( end, buffer full )
( buffer not full, let's write )
ACIA_IO INAn,
(HL) A LDrr,
( advance W> )
HL INCss,
DE ACIAR) @ LDdd(nn),
DE SUBHLss,
JRNZ, L4 FWR ( skip )
( end of buffer reached )
ACIA( @ LDHL(nn),
L4 FSET ( skip )
ACIAW> @ LD(nn)HL,
L3 FSET L2 FSET ( end )
DE POPqq,
HL POPqq,
AF POPqq,
EI,
RETI,

30
recipes/rc2014/Makefile
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@ -1,25 +1,31 @@
TARGET = os.bin
BASEDIR = ../..
FDIR = $(BASEDIR)/emul/forth
STAGE1 = $(FDIR)/stage1
FORTH0 = $(FDIR)/forth0.bin
FDIR = $(BASEDIR)/forth
EDIR = $(BASEDIR)/emul/forth
STAGE2 = $(EDIR)/stage2
EMUL = $(BASEDIR)/emul/hw/rc2014/classic
SRCS = core.fs str.fs parse.fs readln.fs fmt.fs
PATHS = conf.fs \
${SRCS:%=$(BASEDIR)/forth/%} \
PATHS = pre.fs \
$(FDIR)/core.fs \
$(FDIR)/str.fs \
$(FDIR)/parse.fs \
$(BASEDIR)/drv/acia.fs \
run.fs \
$(FDIR)/stop.fs
$(FDIR)/print.fs \
run.fs
SLATEST = $(BASEDIR)/tools/slatest
STRIPFC = $(BASEDIR)/tools/stripfc
.PHONY: all
all: $(TARGET)
$(TARGET): dict.bin $(FORTH0) $(SLATEST)
cat $(FORTH0) dict.bin > $@
$(TARGET): boot.bin z80c.bin $(SLATEST) $(PATHS)
cat boot.bin z80c.bin > $@
$(SLATEST) $@
cat $(PATHS) | $(STRIPFC) >> $@
dict.bin: conf.fs
cat $(PATHS) | $(STAGE1) > $@
z80c.bin: boot.bin
cat conf.fs $(FDIR)/z80c.fs $(BASEDIR)/drv/acia.z80 $(FDIR)/icore.fs | $(STAGE2) | tee $@ > /dev/null
boot.bin: conf.fs
cat conf.fs $(FDIR)/boot.fs | $(STAGE2) | tee $@ > /dev/null
$(SLATEST):
$(MAKE) -C $(BASEDIR)/tools

3
recipes/rc2014/pre.fs Normal file
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@ -0,0 +1,3 @@
96 RAM+ HERE !
HERE @ 256 /MOD 8 PC! 8 PC!
CURRENT @ 256 /MOD 8 PC! 8 PC!

2
recipes/rc2014/run.fs
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@ -1 +1 @@
: INIT 5 5 PC! BYE ACIA$ INTERPRET ;
ACIA$ LIT< hello (print) BYE