mirror of https://github.com/hsoft/collapseos.git
avra: first steps
This commit is contained in:
Virgil Dupras
parent
e691dab070
commit
57c1a10434
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@ -165,4 +165,17 @@ using `IX` and `IY` as 8-bit registers. We used to support them, but because
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this makes our code incompatible with Z80-compatible CPUs such as the Z180, we
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prefer to avoid these in our code.
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## AVR assembler
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`zasm` can be configured, at compile time, to be a AVR assembler instead of a
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z80 assembler. Directives, literals, symbols, they're all the same, it's just
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instructions and their arguments that change.
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Instructions and their arguments have a ayntax that is similar to other AVR
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assemblers: registers are referred to as `rXX`, mnemonics are the same,
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arguments are separated by commas.
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To assemble an AVR assembler, use the `gluea.asm` file instead of the regular
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one.
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[libz80]: https://github.com/ggambetta/libz80
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@ -0,0 +1,263 @@
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; Same thing as instr.asm, but for AVR instructions
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; *** Instructions table ***
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; List of mnemonic names separated by a null terminator. Their index in the
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; list is their ID. Unlike in zasm, not all mnemonics have constant associated
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; to it because it's generally not needed. This list is grouped by argument
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; categories, and then alphabetically. Categories are ordered so that the 8bit
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; opcodes come first, then the 16bit ones. 0xff ends the chain
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instrNames:
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; Rd(5) + Rr(5)
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.equ I_ADC 0
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.db "ADC", 0
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.db "ADD", 0
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.db "AND", 0
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.db "CLR", 0
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.db "CP", 0
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.db "CPC", 0
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.db "CPSE", 0
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.db "EOR", 0
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.db "MOV", 0
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.db "MUL", 0
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.db "OR", 0
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.db "SBC", 0
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.db "SUB", 0
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; no arg
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.equ I_BREAK 13
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.db "BREAK", 0
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.db "CLC", 0
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.db "CLH", 0
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.db "CLI", 0
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.db "CLN", 0
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.db "CLS", 0
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.db "CLT", 0
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.db "CLV", 0
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.db "CLZ", 0
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.db "EICALL", 0
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.db "EIJMP", 0
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.db "ICALL", 0
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.db "IJMP", 0
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.db "NOP", 0
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.db "RET", 0
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.db "RETI", 0
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.db "SEC", 0
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.db "SEH", 0
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.db "SEI", 0
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.db "SEN", 0
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.db "SES", 0
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.db "SET", 0
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.db "SEV", 0
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.db "SEZ", 0
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.db "SLEEP", 0
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.db "WDR", 0
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; Rd(5)
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.equ I_ASR 39
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.db "ASR", 0
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.db "COM", 0
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.db "DEC", 0
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.db "INC", 0
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.db "LAC", 0
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.db "LAS", 0
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.db "LAT", 0
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.db "LSR", 0
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.db "NEG", 0
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.db "POP", 0
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.db "PUSH", 0
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.db "ROR", 0
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.db "SWAP", 0
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.db "XCH", 0
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.db 0xff
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; 8-bit constant masks associated with each instruction. In the same order as
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; in instrNames
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instrUpMasks1:
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; Rd(5) + Rd(5): XXXXXXrd ddddrrrr
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.db 0b00011100 ; ADC
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.db 0b00001100 ; ADD
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.db 0b00100000 ; AND
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.db 0b00100100 ; CLR
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.db 0b00010100 ; CP
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.db 0b00000100 ; CPC
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.db 0b00010000 ; CPSE
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.db 0b00100100 ; EOR
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.db 0b00101100 ; MOV
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.db 0b10011100 ; MUL
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.db 0b00101000 ; OR
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.db 0b00001000 ; SBC
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.db 0b00011000 ; SUB
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; 16-bit constant masks associated with each instruction. In the same order as
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; in instrNames
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instrUpMasks2:
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; no arg
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.db 0b10010101, 0b10011000 ; BREAK
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.db 0b10010100, 0b10001000 ; CLC
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.db 0b10010100, 0b11011000 ; CLH
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.db 0b10010100, 0b11111000 ; CLI
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.db 0b10010100, 0b10101000 ; CLN
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.db 0b10010100, 0b11001000 ; CLS
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.db 0b10010100, 0b11101000 ; CLT
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.db 0b10010100, 0b10111000 ; CLV
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.db 0b10010100, 0b10011000 ; CLZ
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.db 0b10010101, 0b00011001 ; EICALL
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.db 0b10010100, 0b00011001 ; EIJMP
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.db 0b10010101, 0b00001001 ; ICALL
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.db 0b10010100, 0b00001001 ; IJMP
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.db 0b00000000, 0b00000000 ; NOP
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.db 0b10010101, 0b00001000 ; RET
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.db 0b10010101, 0b00011000 ; RETI
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.db 0b10010100, 0b00001000 ; SEC
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.db 0b10010100, 0b01011000 ; SEH
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.db 0b10010100, 0b01111000 ; SEI
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.db 0b10010100, 0b00101000 ; SEN
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.db 0b10010100, 0b01001000 ; SES
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.db 0b10010100, 0b01101000 ; SET
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.db 0b10010100, 0b00111000 ; SEV
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.db 0b10010100, 0b00011000 ; SEZ
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.db 0b10010101, 0b10001000 ; SLEEP
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.db 0b10010101, 0b10101000 ; WDR
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; Rd(5): XXXXXXXd ddddXXXX
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.db 0b10010100, 0b00000101 ; ASR
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.db 0b10010100, 0b00000000 ; COM
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.db 0b10010100, 0b00001010 ; DEC
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.db 0b10010100, 0b00000011 ; INC
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.db 0b10010010, 0b00000110 ; LAC
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.db 0b10010010, 0b00000101 ; LAS
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.db 0b10010010, 0b00000111 ; LAT
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.db 0b10010100, 0b00000110 ; LSR
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.db 0b10010100, 0b00000001 ; NEG
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.db 0b10010000, 0b00001111 ; POP
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.db 0b10010010, 0b00001111 ; PUSH
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.db 0b10010100, 0b00000111 ; ROR
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.db 0b10010100, 0b00000010 ; SWAP
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.db 0b10010010, 0b00000100 ; XCH
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; Same signature as getInstID in instr.asm
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; Reads string in (HL) and returns the corresponding ID (I_*) in A. Sets Z if
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; there's a match.
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getInstID:
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push bc
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push hl
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push de
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ex de, hl ; DE makes a better needle
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; haystack. -1 because we inc HL at the beginning of the loop
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ld hl, instrNames-1
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ld b, 0xff ; index counter
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.loop:
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inc b
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inc hl
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ld a, (hl)
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inc a ; check if 0xff
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jr z, .notFound
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call strcmpIN
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jr nz, .loop
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; found!
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ld a, b ; index
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cp a ; ensure Z
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.end:
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pop de
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pop hl
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pop bc
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ret
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.notFound:
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dec a ; unset Z
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jr .end
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; Same signature as parseInstruction in instr.asm
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; Parse instruction specified in A (I_* const) with args in I/O and write
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; resulting opcode(s) in I/O.
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; Sets Z on success. On error, A contains an error code (ERR_*)
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parseInstruction:
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; BC, during .spit, is ORred to the spitted opcode.
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ld bc, 0
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cp I_BREAK
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jr c, .spitRd5Rr5
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cp I_ASR
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jr c, .spitNoArg
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; spitRd5
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ld d, a ; save A for later
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call .readR5
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ret nz
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call .placeRd
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ld a, d ; restore A
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; continue to .spitNoArg
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.spitNoArg:
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call .getUp2
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jr .spit
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.spitRd5Rr5:
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ld d, a ; save A for later
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call .readR5
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ret nz
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call .placeRd
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call readComma
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call .readR5
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ret nz
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push af ; --> lvl 1
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; let's start with the 4 lower bits
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and 0xf
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or c
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; We now have our LSB in A. Let's spit it now.
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call ioPutB
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pop af ; <-- lvl 1
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; and now that last high bit, currently bit 4, which must become bit 1
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and 0b00010000
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rra \ rra \ rra
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or b
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ld b, a
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ld a, d ; restore A
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ld hl, instrUpMasks1
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call addHL
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; now that's our MSB
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jr .spitMSB
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.spit:
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; LSB is spit *before* MSB
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inc hl
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ld a, (hl)
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or c
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call ioPutB
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dec hl
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.spitMSB:
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ld a, (hl)
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or b
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call ioPutB
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xor a ; ensure Z, set success
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ret
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; local routines
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; place number in A in BC at position .......d dddd....
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; BC is assumed to be 0
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.placeRd:
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sla a \ rla \ rla \ rla ; last RLA might set carry
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rl b
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ld c, a
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ret
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; Fetch a 16-bit upcode specified by instr index in A and set that upcode in HL
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.getUp2:
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sub I_BREAK
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sla a ; A * 2
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ld hl, instrUpMasks2
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jp addHL
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; read a rXX argument and return register number in A.
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; Set Z for success.
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.readR5:
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call readWord
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ld a, (hl)
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call upcase
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cp 'R'
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ret nz ; not a register
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inc hl
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call parseDecimal
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ret nz
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push ix \ pop hl
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ld a, h
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or a
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ret nz ; should be zero
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ld a, l
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cp 32
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jp nc, unsetZ ; must be < 32
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; we're good!
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cp a ; ensure Z
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ret
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@ -0,0 +1,134 @@
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The AVR instruction set is a bit more regular than z80's, which allows us for
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simpler upcode spitting logic (simplicity which is lost when we need to take
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into account all AVR models and instruction constraints on each models). This
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file categorizes all available ops with their opcode signature. X means upcode
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bit.
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Categories are in descending order of "popularity"
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Mnemonics with "*" are a bit special.
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### 16-bit
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## Plain
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XXXX XXXX XXXX XXXX
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BREAK, CLC, CLH, CLI, CLN, CLS, CLT, CLV, CLZ, EICALL, EIJMP, ELPM*, ICALL,
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IJMP, NOP, RET, RETI, SEC, SEH, SEI, SEN, SES, SET, SEV, SEZ, SLEEP, SPM*, WDR
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## Rd(5)
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XXXX XXXd dddd XXXX
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ASR, COM, DEC, ELPM*, INC, LAC, LAS, LAT, LD*, LPM*, LSR, NEG, POP, PUSH, ROR,
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ST*, SWAP, XCH
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## Rd(5) + Rr(5)
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XXXX XXrd dddd rrrr
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ADC, ADD, AND, CLR, CP, CPC, CPSE, EOR, MOV, MUL, OR, ROL*, SBC, SUB,
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TST*
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## k(7)
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XXXX XXkk kkkk kXXX
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BRCC, BRCS, BREQ, BRGE, BRHC, BRHS, BRID, BRIE, BRLO, BRLT, BRMI, BRNE, BRPL,
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BRSH, BRTC, BRTS, BRVC, BRVS
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## Rd(4) + K(8)
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XXXX KKKK dddd KKKK
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ANDI, CBR*, CPI, LDI, ORI, SBCI, SBR, SUBI
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## Rd(5) + bit
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XXXX XXXd dddd Xbbb
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BLD, BST, SBRC, SBRS
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## A(5) + bit
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XXXX XXXX AAAA Abbb
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CBI, SBI, SBIC, SBIS
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## Rd(3) + Rr(3)
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XXXX XXXX Xddd Xrrr
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FMUL, FMULS, FMULSU, MULSU
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## Rd(4) + Rr(4)
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XXXX XXXX dddd rrrr
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MOVW, MULS
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## Rd(5) + A(6)
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XXXX XAAd dddd AAAA
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IN, OUT
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## Rd(4) + k(7)
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XXXX Xkkk dddd kkkk
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LDS*, STS*
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## Rd(2) + K
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XXXX XXXX KKdd KKKK
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ADIW, SBIW
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## Rd(4)
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XXXX XXXX dddd XXXX
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SER
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## K(4)
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XXXX XXXX KKKK XXXX
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DES
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## k(12)
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XXXX kkkk kkkk kkkk
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RCALL, RJMP
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## SREG
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XXXX XXXX Xsss XXXX
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BCLR, BSET
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## SREG + k(7)
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XXXX XXkk kkkk ksss
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BRBC, BRBS
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### 32-bit
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## k(22)
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XXXX XXXk kkkk XXXk
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kkkk kkkk kkkk kkkk
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CALL, JMP
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## Rd(5) + k(16)
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XXXX XXXd dddd XXXX
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kkkk kkkk kkkk kkkk
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LDS*, STS*
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@ -0,0 +1,45 @@
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; avra
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;
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; This glue code assembles as assembler for AVR microcontrollers. It looks a
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; lot like zasm, but it spits AVR binary. Comments have been stripped, refer
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; to glue.asm for details.
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.inc "user.h"
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; *** Overridable consts ***
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.equ ZASM_REG_MAXCNT 0xff
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.equ ZASM_LREG_MAXCNT 0x20
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.equ ZASM_REG_BUFSZ 0x700
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.equ ZASM_LREG_BUFSZ 0x100
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; ******
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.inc "err.h"
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.inc "ascii.h"
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.inc "blkdev.h"
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.inc "fs.h"
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jp zasmMain
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.inc "core.asm"
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.inc "zasm/const.asm"
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.inc "lib/util.asm"
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.inc "lib/ari.asm"
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.inc "lib/parse.asm"
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.inc "lib/args.asm"
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.inc "zasm/util.asm"
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.equ IO_RAMSTART USER_RAMSTART
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.inc "zasm/io.asm"
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.equ TOK_RAMSTART IO_RAMEND
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.inc "zasm/tok.asm"
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.inc "zasm/avr.asm"
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.equ DIREC_RAMSTART TOK_RAMEND
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.inc "zasm/directive.asm"
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.inc "zasm/parse.asm"
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.equ EXPR_PARSE parseNumberOrSymbol
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.inc "lib/expr.asm"
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.equ SYM_RAMSTART DIREC_RAMEND
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.inc "zasm/symbol.asm"
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.equ ZASM_RAMSTART SYM_RAMEND
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.inc "zasm/main.asm"
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USER_RAMSTART:
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@ -76,6 +76,35 @@ strncmpI:
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; early, set otherwise)
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ret
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; strcmp, then next. Same thing as strcmp, but case insensitive and if strings
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; are not equal, make HL point to the character right after the null
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; termination. We assume that the haystack (HL), has uppercase chars.
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strcmpIN:
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push de ; --> lvl 1
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push hl ; --> lvl 2
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.loop:
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ld a, (de)
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call upcase
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cp (hl)
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jr nz, .notFound ; not equal? break early.
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or a ; If our chars are null, stop the cmp
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jr z, .found
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inc hl
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inc de
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jr .loop
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.found:
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pop hl ; <-- lvl 2
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pop de ; <-- lvl 1
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; Z already set
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ret
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.notFound:
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; Not found, we skip the string
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call strskip
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pop de ; <-- lvl 2, junk
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pop de ; <-- lvl 1
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ret
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; If string at (HL) starts with ( and ends with ), "enter" into the parens
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; (advance HL and put a null char at the end of the string) and set Z.
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; Otherwise, do nothing and reset Z.
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@ -1,6 +1,7 @@
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/shell/shell
|
||||
/bshell/shell
|
||||
/zasm/zasm
|
||||
/zasm/avra
|
||||
/runbin/runbin
|
||||
/*/*-bin.h
|
||||
/*/*.bin
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@ TARGETS = shell/shell zasm/zasm runbin/runbin
|
|||
KERNEL = ../../kernel
|
||||
APPS = ../../apps
|
||||
ZASMBIN = zasm/zasm
|
||||
AVRABIN = zasm/avra
|
||||
ZASMSH = ../zasm.sh
|
||||
SHELLAPPS = zasm ed
|
||||
SHELLTGTS = ${SHELLAPPS:%=cfsin/%}
|
||||
|
|
@ -10,7 +11,7 @@ CFSIN_CONTENTS = $(SHELLTGTS) cfsin/user.h
|
|||
OBJS = emul.o libz80/libz80.o
|
||||
|
||||
.PHONY: all
|
||||
all: $(TARGETS) $(CFSIN_CONTENTS)
|
||||
all: $(TARGETS) $(AVRABIN) $(CFSIN_CONTENTS)
|
||||
|
||||
# -o in sync with SHELL_CODE in shell/glue.asm
|
||||
shell/shell.bin: shell/glue.asm $(ZASMBIN)
|
||||
|
|
@ -19,18 +20,27 @@ shell/shell.bin: shell/glue.asm $(ZASMBIN)
|
|||
shell/shell-bin.h: shell/shell.bin
|
||||
./bin2c.sh KERNEL < shell/shell.bin | tee $@ > /dev/null
|
||||
|
||||
shell/shell: shell/shell.c $(OBJS) shell/shell-bin.h
|
||||
$(CC) shell/shell.c $(OBJS) -o $@
|
||||
|
||||
zasm/kernel-bin.h: zasm/kernel.bin
|
||||
./bin2c.sh KERNEL < zasm/kernel.bin | tee $@ > /dev/null
|
||||
|
||||
zasm/zasm-bin.h: zasm/zasm.bin
|
||||
./bin2c.sh USERSPACE < zasm/zasm.bin | tee $@ > /dev/null
|
||||
|
||||
shell/shell: shell/shell.c $(OBJS) shell/shell-bin.h
|
||||
$(CC) shell/shell.c $(OBJS) -o $@
|
||||
|
||||
$(ZASMBIN): zasm/zasm.c $(OBJS) zasm/kernel-bin.h zasm/zasm-bin.h $(CFSPACK)
|
||||
$(CC) zasm/zasm.c $(OBJS) -o $@
|
||||
|
||||
zasm/avra.bin: $(ZASMBIN)
|
||||
$(ZASMSH) $(KERNEL) $(APPS) zasm/user.h < $(APPS)/zasm/gluea.asm > $@
|
||||
|
||||
zasm/avra-bin.h: zasm/avra.bin
|
||||
./bin2c.sh USERSPACE < zasm/avra.bin | tee $@ > /dev/null
|
||||
|
||||
$(AVRABIN): zasm/zasm.c $(OBJS) zasm/kernel-bin.h zasm/avra-bin.h
|
||||
$(CC) -D AVRA zasm/zasm.c $(OBJS) -o $@
|
||||
|
||||
runbin/runbin: runbin/runbin.c $(OBJS)
|
||||
$(CC) runbin/runbin.c $(OBJS) -o $@
|
||||
|
||||
|
|
@ -52,7 +62,7 @@ cfsin/user.h: shell/user.h
|
|||
cp shell/user.h $@
|
||||
|
||||
.PHONY: updatebootstrap
|
||||
updatebootstrap: $(ZASMBIN) $(INCCFS)
|
||||
updatebootstrap: $(ZASMBIN)
|
||||
$(ZASMSH) $(KERNEL) < zasm/glue.asm > zasm/kernel.bin
|
||||
$(ZASMSH) $(KERNEL) $(APPS) zasm/user.h < $(APPS)/zasm/glue.asm > zasm/zasm.bin
|
||||
|
||||
|
|
|
|||
|
|
@ -60,6 +60,12 @@ Those binaries can be updated with the `make updatebootstrap` command. If they
|
|||
are up-to date and that zasm isn't broken, this command should output the same
|
||||
binary as before.
|
||||
|
||||
## avra
|
||||
|
||||
In the `zasm` folder, there's also `avra` which is a zasm compiled as an AVR
|
||||
assembler. It works the same way as zasm except it expects AVR mnemonics and
|
||||
spits AVR binaries.
|
||||
|
||||
## runbin
|
||||
|
||||
This is a very simple tool that reads binary z80 code from stdin, loads it in
|
||||
|
|
|
|||
|
|
@ -3,7 +3,11 @@
|
|||
#include <string.h>
|
||||
#include "../emul.h"
|
||||
#include "kernel-bin.h"
|
||||
#ifdef AVRA
|
||||
#include "avra-bin.h"
|
||||
#else
|
||||
#include "zasm-bin.h"
|
||||
#endif
|
||||
|
||||
/* zasm reads from a specified blkdev, assemble the file and writes the result
|
||||
* in another specified blkdev. In our emulator layer, we use stdin and stdout
|
||||
|
|
|
|||
|
|
@ -3,9 +3,10 @@ CFSPACK = ../cfspack/cfspack
|
|||
|
||||
.PHONY: run
|
||||
run:
|
||||
$(MAKE) -C $(EMULDIR) zasm/zasm runbin/runbin shell/shell
|
||||
$(MAKE) -C $(EMULDIR) zasm/zasm zasm/avra runbin/runbin shell/shell
|
||||
cd unit && ./runtests.sh
|
||||
cd zasm && ./runtests.sh
|
||||
cd avra && ./runtests.sh
|
||||
cd shell && ./runtests.sh
|
||||
|
||||
$(CFSPACK):
|
||||
|
|
|
|||
|
|
@ -0,0 +1,28 @@
|
|||
#!/bin/sh -e
|
||||
|
||||
AVRA=../../emul/zasm/avra
|
||||
|
||||
cmpas() {
|
||||
FN=$1
|
||||
EXPECTED=$(xxd ${FN%.*}.expected)
|
||||
ACTUAL=$(cat ${FN} | $AVRA | xxd)
|
||||
if [ "$ACTUAL" = "$EXPECTED" ]; then
|
||||
echo ok
|
||||
else
|
||||
echo actual
|
||||
echo "$ACTUAL"
|
||||
echo expected
|
||||
echo "$EXPECTED"
|
||||
exit 1
|
||||
fi
|
||||
}
|
||||
|
||||
if [ ! -z $1 ]; then
|
||||
cmpas $1
|
||||
exit 0
|
||||
fi
|
||||
|
||||
for fn in *.asm; do
|
||||
echo "Comparing ${fn}"
|
||||
cmpas $fn
|
||||
done
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
add r1, r31
|
||||
ret
|
||||
sleep
|
||||
break
|
||||
asr r20
|
||||
|
|
@ -0,0 +1 @@
|
|||
•ˆ•˜•E•
|
||||
Loading…
Reference in New Issue