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recipes/rc2014: add missing calls to fsInit

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Also, tighten RAM addresses. They were unecessarily loose.
This commit is contained in:
Virgil Dupras 2019-06-17 13:44:36 -04:00
parent 914c6d5abc
commit 3e437747c2
3 changed files with 8 additions and 6 deletions
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1
recipes/rc2014/sdcard/glue.asm
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@ -69,6 +69,7 @@ init:
ld hl, aciaGetC ld hl, aciaGetC
ld de, aciaPutC ld de, aciaPutC
call stdioInit call stdioInit
call fsInit
call shellInit call shellInit
ld hl, pgmShellHook ld hl, pgmShellHook
ld (SHELL_CMDHOOK), hl ld (SHELL_CMDHOOK), hl

9
recipes/rc2014/zasm/glue.asm
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@ -1,10 +1,10 @@
; classic RC2014 setup (8K ROM + 32K RAM) and a stock Serial I/O module ; classic RC2014 setup (8K ROM + 32K RAM) and a stock Serial I/O module
; The RAM module is selected on A15, so it has the range 0x8000-0xffff ; The RAM module is selected on A15, so it has the range 0x8000-0xffff
.equ RAMSTART 0x8000 .equ RAMSTART 0x8000
; kernel RAM usage, because of SDC, is a bit high and bring us almost to 0x9e00 ; kernel RAM usage, because of SDC, is a bit high and bring us almost to 0x8500
; We allocate at least 0x100 bytes for RAM, which is why we have this threshold. ; We allocate at least 0x200 bytes for the stack, which is why we have this
; for the stack. ; threshold.
.equ RAMEND 0xa000 .equ RAMEND 0x8700
.equ PGM_CODEADDR RAMEND .equ PGM_CODEADDR RAMEND
.equ ACIA_CTL 0x80 ; Control and status. RS off. .equ ACIA_CTL 0x80 ; Control and status. RS off.
.equ ACIA_IO 0x81 ; Transmit. RS on. .equ ACIA_IO 0x81 ; Transmit. RS on.
@ -102,6 +102,7 @@ init:
ld hl, aciaGetC ld hl, aciaGetC
ld de, aciaPutC ld de, aciaPutC
call stdioInit call stdioInit
call fsInit
call shellInit call shellInit
ld hl, pgmShellHook ld hl, pgmShellHook
ld (SHELL_CMDHOOK), hl ld (SHELL_CMDHOOK), hl

4
recipes/rc2014/zasm/user.h
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@ -1,5 +1,5 @@
.equ USER_CODE 0xa000 .equ USER_CODE 0x8700
.equ USER_RAMSTART USER_CODE+0x1800 .equ USER_RAMSTART USER_CODE+0x1900
.equ FS_HANDLE_SIZE 6 .equ FS_HANDLE_SIZE 6
.equ BLOCKDEV_SIZE 8 .equ BLOCKDEV_SIZE 8