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Rename RAMSTART to SYSVARS
It's more descriptive this way. Also, I'll soon add a new HERESTART config.
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parent
9424770caa
commit
3068b58be5
10
blk/080
10
blk/080
@ -2,15 +2,15 @@ System variables
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There are some core variables in the core system that are
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There are some core variables in the core system that are
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referred to directly by their address in memory throughout the
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referred to directly by their address in memory throughout the
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code. The place where they live is configurable by the RAMSTART
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code. The place where they live is configurable by the SYSVARS
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constant in conf.fs, but their relative offset is not. In fact,
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constant in xcomp unit, but their relative offset is not. In
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they're mostly referred to directly as their numerical offset
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fact, they're mostly referred to directly as their numerical
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along with a comment indicating what this offset refers to.
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offset along with a comment indicating what this offset refers
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to.
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This system is a bit fragile because every time we change those
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This system is a bit fragile because every time we change those
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offsets, we have to be careful to adjust all system variables
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offsets, we have to be careful to adjust all system variables
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offsets, but thankfully, there aren't many system variables.
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offsets, but thankfully, there aren't many system variables.
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Here's a list of them:
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Here's a list of them:
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(cont.)
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(cont.)
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6
blk/081
6
blk/081
@ -1,4 +1,4 @@
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RAMSTART FUTURE USES +3c BLK(*
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SYSVARS FUTURE USES +3c BLK(*
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+02 CURRENT +3e A@*
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+02 CURRENT +3e A@*
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+04 HERE +40 A!*
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+04 HERE +40 A!*
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+06 C<? +42 FUTURE USES
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+06 C<? +42 FUTURE USES
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@ -6,8 +6,8 @@ RAMSTART FUTURE USES +3c BLK(*
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+0a NLPTR +53 (emit) override
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+0a NLPTR +53 (emit) override
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+0c C<* +55 (key) override
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+0c C<* +55 (key) override
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+0e WORDBUF +57 FUTURE USES
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+0e WORDBUF +57 FUTURE USES
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+2e BOOT C< PTR
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+2e BOOT C< PTR
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+30 IN>
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+30 IN>
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+32 IN(* +70 DRIVERS
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+32 IN(* +70 DRIVERS
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+34 BLK@* +80 RAMEND
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+34 BLK@* +80 RAMEND
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+36 BLK!*
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+36 BLK!*
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2
blk/089
2
blk/089
@ -4,7 +4,7 @@ On boot, we jump to the "main" routine in B289 which does
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very few things.
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very few things.
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1. Set SP to PS_ADDR and IX to RS_ADDR
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1. Set SP to PS_ADDR and IX to RS_ADDR
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2. Sets HERE to RAMEND (RAMSTART+0x80).
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2. Sets HERE to SYSVARS+0x80.
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3. Sets CURRENT to value of LATEST field in stable ABI.
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3. Sets CURRENT to value of LATEST field in stable ABI.
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4. Execute the word referred to by 0x04 (BOOT) in stable ABI.
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4. Execute the word referred to by 0x04 (BOOT) in stable ABI.
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4
blk/280
4
blk/280
@ -4,8 +4,8 @@ This assembles the boot binary. It requires the Z80 assembler
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(B200) and cross compilation setup (B260). It also requires
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(B200) and cross compilation setup (B260). It also requires
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these constants to be set:
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these constants to be set:
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RAMSTART: beginning address of RAM. This is where system
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SYSVARS: This is where system variables are placed. HERE is
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variables are placed. HERE is then placed at RAM+80 (ref B80).
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then placed at SYSVARS+0x80 (ref B80).
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RS_ADDR: to be set to the bottom address of the Return Stack.
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RS_ADDR: to be set to the bottom address of the Return Stack.
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6
blk/299
6
blk/299
@ -2,12 +2,12 @@ PC ORG @ 1 + ! ( main )
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( STACK OVERFLOW PROTECTION: See B76 )
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( STACK OVERFLOW PROTECTION: See B76 )
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SP PS_ADDR LDdn, IX RS_ADDR LDdn,
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SP PS_ADDR LDdn, IX RS_ADDR LDdn,
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( HERE begins at RAMEND )
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( HERE begins at RAMEND )
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HL RAMSTART 0x80 + LDdn,
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HL SYSVARS 0x80 + LDdn,
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RAMSTART 0x04 + LD(n)HL, ( RAM+04 == HERE )
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SYSVARS 0x04 + LD(n)HL, ( RAM+04 == HERE )
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( LATEST is a label to the latest entry of the dict. It is
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( LATEST is a label to the latest entry of the dict. It is
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written at offset 0x08 by the process or person building
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written at offset 0x08 by the process or person building
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Forth. )
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Forth. )
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BIN( @ 0x08 + LDHL(n),
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BIN( @ 0x08 + LDHL(n),
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RAMSTART 0x02 ( CURRENT ) + LD(n)HL,
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SYSVARS 0x02 ( CURRENT ) + LD(n)HL,
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DE BIN( @ 0x04 ( BOOT ) + LDdd(n),
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DE BIN( @ 0x04 ( BOOT ) + LDdd(n),
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JR, L1 FWR ( execute, B301 )
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JR, L1 FWR ( execute, B301 )
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2
blk/353
2
blk/353
@ -1,4 +1,4 @@
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: RAM+ [ RAMSTART LITN ] + ; : BIN+ [ BIN( @ LITN ] + ;
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: RAM+ [ SYSVARS LITN ] + ; : BIN+ [ BIN( @ LITN ] + ;
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: HERE 0x04 RAM+ ;
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: HERE 0x04 RAM+ ;
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: CURRENT* 0x51 RAM+ ; : CURRENT CURRENT* @ ;
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: CURRENT* 0x51 RAM+ ; : CURRENT CURRENT* @ ;
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: H@ HERE @ ;
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: H@ HERE @ ;
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2
blk/425
2
blk/425
@ -1,5 +1,5 @@
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anatomy. First, we have constants. Some of them are device-
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anatomy. First, we have constants. Some of them are device-
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specific, but some of them are always there. RAMSTART is the
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specific, but some of them are always there. SYSVARS is the
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address at which the RAM starts on the system. System variables
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address at which the RAM starts on the system. System variables
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will go there and HERE will go after it.
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will go there and HERE will go after it.
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2
blk/582
2
blk/582
@ -2,7 +2,7 @@
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0x81 CONSTANT ACIA_IO ( IO port for ACIA's data registers )
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0x81 CONSTANT ACIA_IO ( IO port for ACIA's data registers )
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( Address in memory that can be used variables shared
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( Address in memory that can be used variables shared
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with ACIA's native words. 8 bytes used. )
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with ACIA's native words. 8 bytes used. )
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CREATE ACIA_MEM RAMSTART 0x70 + ,
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CREATE ACIA_MEM SYSVARS 0x70 + ,
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( Points to ACIA buf )
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( Points to ACIA buf )
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: ACIA( ACIA_MEM @ 4 + ;
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: ACIA( ACIA_MEM @ 4 + ;
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( Points to ACIA buf end )
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( Points to ACIA buf end )
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2
blk/618
2
blk/618
@ -1,4 +1,4 @@
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0x8000 CONSTANT RAMSTART
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0x8000 CONSTANT SYSVARS
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0xff00 CONSTANT RS_ADDR 0xfffa CONSTANT PS_ADDR
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0xff00 CONSTANT RS_ADDR 0xfffa CONSTANT PS_ADDR
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4 CONSTANT SDC_SPI
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4 CONSTANT SDC_SPI
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5 CONSTANT SDC_CSLOW 6 CONSTANT SDC_CSHIGH
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5 CONSTANT SDC_CSLOW 6 CONSTANT SDC_CSHIGH
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4
blk/812
4
blk/812
@ -3,7 +3,7 @@ PC 3 - ORG @ 1+ ! ( main )
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SP PS_ADDR MOVxI, BP RS_ADDR MOVxI,
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SP PS_ADDR MOVxI, BP RS_ADDR MOVxI,
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DI 0x08 MOVxm, ( LATEST )
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DI 0x08 MOVxm, ( LATEST )
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( HERE begins at CURRENT )
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( HERE begins at CURRENT )
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RAMSTART 0x4 ( HERE ) + DI MOVmx,
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SYSVARS 0x4 ( HERE ) + DI MOVmx,
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RAMSTART 0x2 ( CURRENT ) + DI MOVmx,
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SYSVARS 0x2 ( CURRENT ) + DI MOVmx,
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DI 0x04 ( BOOT ) MOVxm,
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DI 0x04 ( BOOT ) MOVxm,
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JMPn, lblexec @ RPCn, ( execute )
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JMPn, lblexec @ RPCn, ( execute )
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2
blk/842
2
blk/842
@ -1,6 +1,6 @@
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0xff00 CONSTANT RS_ADDR
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0xff00 CONSTANT RS_ADDR
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0xfffa CONSTANT PS_ADDR
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0xfffa CONSTANT PS_ADDR
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RS_ADDR 0x80 - CONSTANT RAMSTART
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RS_ADDR 0x80 - CONSTANT SYSVARS
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750 LOAD ( 8086 asm )
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750 LOAD ( 8086 asm )
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262 LOAD ( xcomp ) 270 LOAD ( xcomp overrides )
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262 LOAD ( xcomp ) 270 LOAD ( xcomp overrides )
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805 820 LOADR
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805 820 LOADR
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@ -1,4 +1,4 @@
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0xe800 CONSTANT RAMSTART
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0xe800 CONSTANT SYSVARS
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0xff00 CONSTANT RS_ADDR
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0xff00 CONSTANT RS_ADDR
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0xfffa CONSTANT PS_ADDR
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0xfffa CONSTANT PS_ADDR
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: CODE ( natidx -- ) (entry) 0 C, C, ;
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: CODE ( natidx -- ) (entry) 0 C, C, ;
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@ -1,4 +1,4 @@
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0xe800 CONSTANT RAMSTART
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0xe800 CONSTANT SYSVARS
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0xff00 CONSTANT RS_ADDR
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0xff00 CONSTANT RS_ADDR
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0xfffa CONSTANT PS_ADDR
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0xfffa CONSTANT PS_ADDR
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212 LOAD ( z80 assembler )
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212 LOAD ( z80 assembler )
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@ -68,7 +68,7 @@ First, we need a `(ps2kc)` routine. In this case, it's easy, it's
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`: (ps2kc) 8 PC@ ;`. Add this after ACIA loading. Then, we can load PS/2
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`: (ps2kc) 8 PC@ ;`. Add this after ACIA loading. Then, we can load PS/2
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subsystem. You add `411 414 LOADR`. Then, at initialization, you add `PS2$`
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subsystem. You add `411 414 LOADR`. Then, at initialization, you add `PS2$`
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after `ACIA$`. You also need to define `PS2_MEM` at the top. You can probably
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after `ACIA$`. You also need to define `PS2_MEM` at the top. You can probably
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use `RAMSTART + 0x7a`.
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use `SYSVARS + 0x7a`.
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Rebuild, reflash, should work. For debugging purposes, you might not want to
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Rebuild, reflash, should work. For debugging purposes, you might not want to
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go straight to plugging PS/2 `(key)` into the system. What I did myself was
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go straight to plugging PS/2 `(key)` into the system. What I did myself was
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@ -104,7 +104,7 @@ to TH (and also the A/B on the '157). Q is hooked to PB0 and TL.
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We start with the base recipe and add a few things:
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We start with the base recipe and add a few things:
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1. at the top: `RAMSTART 0x72 + CONSTANT PS2_MEM`
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1. at the top: `SYSVARS 0x72 + CONSTANT PS2_MEM`
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2. After VDP load: `641 LOAD : (ps2kc) (ps2kcB) ;` (that binds us to port B)
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2. After VDP load: `641 LOAD : (ps2kc) (ps2kcB) ;` (that binds us to port B)
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3. Right after: `411 414 LOADR` (that gives us `(key)`)
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3. Right after: `411 414 LOADR` (that gives us `(key)`)
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4. After `VDP$`: `PS2$`.
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4. After `VDP$`: `PS2$`.
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@ -1,14 +1,14 @@
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( 8K of onboard RAM )
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( 8K of onboard RAM )
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0xc000 CONSTANT RAMSTART
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0xc000 CONSTANT SYSVARS
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0xdd00 CONSTANT RS_ADDR
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0xdd00 CONSTANT RS_ADDR
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( Memory register at the end of RAM. Must not overwrite )
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( Memory register at the end of RAM. Must not overwrite )
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0xddca CONSTANT PS_ADDR
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0xddca CONSTANT PS_ADDR
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RAMSTART 0x70 + CONSTANT VDP_MEM
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SYSVARS 0x70 + CONSTANT VDP_MEM
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0xbf CONSTANT VDP_CTLPORT
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0xbf CONSTANT VDP_CTLPORT
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0xbe CONSTANT VDP_DATAPORT
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0xbe CONSTANT VDP_DATAPORT
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32 CONSTANT VDP_COLS
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32 CONSTANT VDP_COLS
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24 CONSTANT VDP_ROWS
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24 CONSTANT VDP_ROWS
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RAMSTART 0x72 + CONSTANT PAD_MEM
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SYSVARS 0x72 + CONSTANT PAD_MEM
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0x3f CONSTANT PAD_CTLPORT
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0x3f CONSTANT PAD_CTLPORT
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0xdc CONSTANT PAD_D1PORT
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0xdc CONSTANT PAD_D1PORT
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212 LOAD ( z80 assembler )
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212 LOAD ( z80 assembler )
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@ -1,8 +1,8 @@
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0x8000 CONSTANT RAMSTART
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0x8000 CONSTANT SYSVARS
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0xbf00 CONSTANT RS_ADDR
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0xbf00 CONSTANT RS_ADDR
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0xbffa CONSTANT PS_ADDR
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0xbffa CONSTANT PS_ADDR
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RAMSTART 0x70 + CONSTANT LCD_MEM
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SYSVARS 0x70 + CONSTANT LCD_MEM
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RAMSTART 0x72 + CONSTANT KBD_MEM
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SYSVARS 0x72 + CONSTANT KBD_MEM
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0x01 CONSTANT KBD_PORT
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0x01 CONSTANT KBD_PORT
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212 LOAD ( z80 assembler )
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212 LOAD ( z80 assembler )
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: ZFILL, ( u ) 0 DO 0 A, LOOP ;
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: ZFILL, ( u ) 0 DO 0 A, LOOP ;
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@ -1,6 +1,6 @@
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0xff00 CONSTANT RS_ADDR
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0xff00 CONSTANT RS_ADDR
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0xfffa CONSTANT PS_ADDR
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0xfffa CONSTANT PS_ADDR
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RS_ADDR 0x80 - CONSTANT RAMSTART
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RS_ADDR 0x80 - CONSTANT SYSVARS
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212 LOAD ( z80 assembler )
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212 LOAD ( z80 assembler )
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262 LOAD ( xcomp )
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262 LOAD ( xcomp )
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282 LOAD ( boot.z80.decl )
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282 LOAD ( boot.z80.decl )
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@ -1,5 +1,5 @@
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0xff00 CONSTANT RS_ADDR 0xfffa CONSTANT PS_ADDR
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0xff00 CONSTANT RS_ADDR 0xfffa CONSTANT PS_ADDR
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RS_ADDR 0x80 - CONSTANT RAMSTART
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RS_ADDR 0x80 - CONSTANT SYSVARS
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212 LOAD ( z80 assembler )
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212 LOAD ( z80 assembler )
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262 LOAD ( xcomp )
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262 LOAD ( xcomp )
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282 LOAD ( boot.z80.decl )
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282 LOAD ( boot.z80.decl )
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