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Make the SPI Relay protocol support multiple devices
Working on programming AVR chips exposes a glaring omission in my first design of the SPI Relay: not allowing multiple devices make this task hard. I constantly have to unplug my SD card before, plug the AVR chip holder, then play a bit, then unplug the AVR holder, then replug the SD card... My prototype for a SPI relay design is built, but I haven't tested it yet. I need to adapt the code first, which is what I do here. When the prototype is tested, I'll update the SDC recipe with a new schema.
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parent
350b7c5939
commit
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3
blk/420
3
blk/420
@ -4,7 +4,8 @@ Load range: B423-B436
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This subsystem is designed for a ad-hoc adapter card that acts
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This subsystem is designed for a ad-hoc adapter card that acts
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as a SPI relay between the z80 bus and the SD card. It requires
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as a SPI relay between the z80 bus and the SD card. It requires
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a driver providing the SPI Relay protocol.
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a driver providing the SPI Relay protocol. You need to define
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SDC_DEVID to specify which ID will be supplied to (spie).
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Through that layer, this driver implements the SDC protocol
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Through that layer, this driver implements the SDC protocol
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allowing it to provide BLK@ and BLK!.
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allowing it to provide BLK@ and BLK!.
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6
blk/429
6
blk/429
@ -1,15 +1,15 @@
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( cmd arg1 arg2 -- r )
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( cmd arg1 arg2 -- r )
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( Send a command that expects a R1 response, handling CS. )
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( Send a command that expects a R1 response, handling CS. )
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: SDCMDR1 (spie) _cmd (spid) ;
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: SDCMDR1 [ SDC_DEVID LITN ] (spie) _cmd 0 (spie) ;
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( cmd arg1 arg2 -- r arg1 arg2 )
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( cmd arg1 arg2 -- r arg1 arg2 )
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( Send a command that expects a R7 response, handling CS. A R7
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( Send a command that expects a R7 response, handling CS. A R7
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is a R1 followed by 4 bytes. arg1 contains bytes 0:1, arg2
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is a R1 followed by 4 bytes. arg1 contains bytes 0:1, arg2
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has 2:3 )
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has 2:3 )
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: SDCMDR7
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: SDCMDR7
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(spie)
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[ SDC_DEVID LITN ] (spie)
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_cmd ( r )
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_cmd ( r )
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_idle 8 LSHIFT _idle + ( r arg1 )
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_idle 8 LSHIFT _idle + ( r arg1 )
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_idle 8 LSHIFT _idle + ( r arg1 arg2 )
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_idle 8 LSHIFT _idle + ( r arg1 arg2 )
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(spid)
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0 (spie)
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;
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;
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2
blk/430
2
blk/430
@ -1,4 +1,4 @@
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: _err (spid) ABORT" SDerr" ;
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: _err 0 (spie) ABORT" SDerr" ;
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( Tight definition ahead, pre-comment.
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( Tight definition ahead, pre-comment.
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5
blk/432
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blk/432
@ -1,5 +1,6 @@
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: _sdc@ ( dstaddr blkno -- )
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: _sdc@ ( dstaddr blkno -- )
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(spie) 0x51 ( CMD17 ) 0 ROT ( a cmd 0 blkno ) _cmd
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[ SDC_DEVID LITN ] (spie)
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0x51 ( CMD17 ) 0 ROT ( a cmd 0 blkno ) _cmd
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IF _err THEN
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IF _err THEN
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_wait 0xfe = NOT IF _err THEN
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_wait 0xfe = NOT IF _err THEN
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0 SWAP ( crc a )
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0 SWAP ( crc a )
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@ -11,5 +12,5 @@
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LOOP
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LOOP
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DROP ( crc1 )
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DROP ( crc1 )
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_idle 8 LSHIFT _idle + ( crc2 )
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_idle 8 LSHIFT _idle + ( crc2 )
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_wait DROP (spid)
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_wait DROP 0 (spie)
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= NOT IF _err THEN ;
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= NOT IF _err THEN ;
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8
blk/434
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blk/434
@ -1,8 +1,8 @@
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: _sdc! ( srcaddr blkno -- )
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: _sdc! ( srcaddr blkno -- )
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(spie) 0x58 ( CMD24 ) 0 ROT ( a cmd 0 blkno ) _cmd
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[ SDC_DEVID LITN ] (spie)
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0x58 ( CMD24 ) 0 ROT ( a cmd 0 blkno ) _cmd
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IF _err THEN
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IF _err THEN
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_idle DROP 0xfe (spix) DROP
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_idle DROP 0xfe (spix) DROP 0 SWAP ( crc a )
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0 SWAP ( crc a )
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512 0 DO ( crc a )
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512 0 DO ( crc a )
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C@+ ( crc a+1 n )
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C@+ ( crc a+1 n )
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ROT OVER ( a n crc n )
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ROT OVER ( a n crc n )
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@ -13,4 +13,4 @@
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LOOP
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LOOP
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DROP ( crc ) 256 /MOD ( lsb msb )
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DROP ( crc ) 256 /MOD ( lsb msb )
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(spix) DROP (spix) DROP
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(spix) DROP (spix) DROP
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_wait DROP (spid) ;
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_wait DROP 0 (spie) ;
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15
blk/595
15
blk/595
@ -1,15 +1,10 @@
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SPI relay driver
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SPI relay driver
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This driver is designed for a ad-hoc adapter card that acts as a
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This driver is designed for a ad-hoc adapter card that acts as a
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SPI relay between the z80 bus and the SPI device. Sending any-
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SPI relay between the z80 bus and the SPI device. When writing
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thing on SPI_CSLOW and SPI_CSHIGH is expected to select/deselect
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to SPI_CTL, we expect a bitmask of the device to select, with
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the device, and writing to SPI_DATA is expected to initiate a
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0 meaning that everything is de-selected. Reading SPI_CTL
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byte exchange. The result of the exchange is excpected to be re-
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returns 0 if the device is ready or 1 if it's still running an
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trieved by reading SPI_DATA.
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exchange. Writing to SPI_DATA initiates an exchange.
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You also need to define the exchange delay with SPI_DELAY. If
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SPI clock is the same as system clock, 2 NOPs are enough:
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: SPI_DELAY NOP, NOP, ;
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Provides the SPI relay protocol. Load driver with "596 LOAD".
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Provides the SPI relay protocol. Load driver with "596 LOAD".
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13
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blk/596
@ -1,12 +1,13 @@
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CODE (spix) ( n -- n )
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CODE (spix) ( n -- n )
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HL POP,
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HL POP, chkPS, A L LDrr,
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chkPS,
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A L LDrr,
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SPI_DATA OUTiA,
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SPI_DATA OUTiA,
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SPI_DELAY
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( wait until xchg is done )
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BEGIN, SPI_CTL INAi, A ORr, JRNZ, AGAIN,
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SPI_DATA INAi,
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SPI_DATA INAi,
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L A LDrr,
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L A LDrr,
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HL PUSH,
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HL PUSH,
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;CODE
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;CODE
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CODE (spie) SPI_CSLOW OUTiA, ;CODE
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CODE (spie) ( n -- )
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CODE (spid) SPI_CSHIGH OUTiA, ;CODE
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HL POP, chkPS, A L LDrr,
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SPI_CTL OUTiA,
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;CODE
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4
blk/691
4
blk/691
@ -7,8 +7,8 @@ VARIABLE aspprevx
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SWAP aspprevx ! ( b ) ;
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SWAP aspprevx ! ( b ) ;
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: _cmd ( b4 b3 b2 b1 -- r4 ) _xc DROP _x DROP _xc DROP _x ;
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: _cmd ( b4 b3 b2 b1 -- r4 ) _xc DROP _x DROP _xc DROP _x ;
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: asprdy ( -- ) BEGIN 0 0 0 0xf0 _cmd 1 AND NOT UNTIL ;
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: asprdy ( -- ) BEGIN 0 0 0 0xf0 _cmd 1 AND NOT UNTIL ;
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: asp$ ( -- )
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: asp$ ( spidevid -- )
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( RESET pulse ) (spie) (spid) (spie)
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( RESET pulse ) DUP (spie) 0 (spie) (spie)
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( wait >20ms ) 5000 0 DO LOOP
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( wait >20ms ) 5000 0 DO LOOP
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( enable prog ) 0xac (spix) DROP
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( enable prog ) 0xac (spix) DROP
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0x53 _x DROP 0 _xc DROP 0 _x DROP ;
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0x53 _x DROP 0 _xc DROP 0 _x DROP ;
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@ -15,13 +15,25 @@ These protocols are described here.
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# PS/2 protocol
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# PS/2 protocol
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This protocol enables communication with a device that spits
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PS/2 keycodes.
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(ps2kc) -- kc Returns the next typed PS/2 keycode from the
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(ps2kc) -- kc Returns the next typed PS/2 keycode from the
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console. Blocking.
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console. Blocking.
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# SPI Relay protocol
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# SPI Relay protocol
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(spie) -- Enable SPI device
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This protocol enables communication with a SPI relay. This
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(spid) -- Disable SPI device
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protocol is designed to support devices with multiple endpoints.
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To that end, (spie) takes a device ID argument, with a meaning
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that is up to the device itself. To disable all devices, supply
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0 to (spie).
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We expect relay devices to support only one enabled device at
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once. Enabling a specific device is expected to disable the
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previously enabled one.
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(spie) n -- Enable SPI device
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(spix) n -- n Perform SPI exchange (push a number, get a
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(spix) n -- n Perform SPI exchange (push a number, get a
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number back)
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number back)
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@ -18,8 +18,7 @@
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#define RAMSTART 0x8000
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#define RAMSTART 0x8000
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#define ACIA_CTL_PORT 0x80
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#define ACIA_CTL_PORT 0x80
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#define ACIA_DATA_PORT 0x81
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#define ACIA_DATA_PORT 0x81
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#define SDC_CSHIGH 0x06
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#define SDC_CTL 0x05
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#define SDC_CSLOW 0x05
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#define SDC_SPI 0x04
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#define SDC_SPI 0x04
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#define MAX_ROMSIZE 0x2000
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#define MAX_ROMSIZE 0x2000
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@ -56,14 +55,16 @@ static void iowr_sdc_spi(uint8_t val)
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sdc_spi_wr(&sdc, val);
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sdc_spi_wr(&sdc, val);
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}
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}
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static void iowr_sdc_cshigh(uint8_t val)
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// in emulation, exchanges are always instantaneous, so we
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// always report as ready.
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static uint8_t iord_sdc_ctl()
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{
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{
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sdc_cshigh(&sdc);
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return 0;
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}
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}
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static void iowr_sdc_cslow(uint8_t val)
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static void iowr_sdc_ctl(uint8_t val)
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{
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{
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sdc_cslow(&sdc);
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sdc_ctl_wr(&sdc, val);
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}
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}
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int main(int argc, char *argv[])
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int main(int argc, char *argv[])
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@ -117,8 +118,8 @@ int main(int argc, char *argv[])
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m->iowr[ACIA_DATA_PORT] = iowr_acia_data;
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m->iowr[ACIA_DATA_PORT] = iowr_acia_data;
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m->iord[SDC_SPI] = iord_sdc_spi;
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m->iord[SDC_SPI] = iord_sdc_spi;
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m->iowr[SDC_SPI] = iowr_sdc_spi;
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m->iowr[SDC_SPI] = iowr_sdc_spi;
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m->iowr[SDC_CSHIGH] = iowr_sdc_cshigh;
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m->iord[SDC_CTL] = iord_sdc_ctl;
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m->iowr[SDC_CSLOW] = iowr_sdc_cslow;
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m->iowr[SDC_CTL] = iowr_sdc_ctl;
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char tosend = 0;
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char tosend = 0;
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while (emul_step()) {
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while (emul_step()) {
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@ -23,14 +23,12 @@ void sdc_init(SDC *sdc)
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sdc->cmd24bytes = -2;
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sdc->cmd24bytes = -2;
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}
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}
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void sdc_cslow(SDC *sdc)
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// TODO: for now, any nonzero value enables the SDC. To allow
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// emulation of systems with multi-devices SPI relay, change
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// this.
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void sdc_ctl_wr(SDC *sdc, uint8_t val)
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{
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{
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sdc->selected = true;
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sdc->selected = val;
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}
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void sdc_cshigh(SDC *sdc)
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{
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sdc->selected = false;
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}
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}
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void sdc_spi_wr(SDC *sdc, uint8_t val)
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void sdc_spi_wr(SDC *sdc, uint8_t val)
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@ -31,7 +31,6 @@ typedef struct {
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} SDC;
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} SDC;
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void sdc_init(SDC *sdc);
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void sdc_init(SDC *sdc);
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void sdc_cslow(SDC *sdc);
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void sdc_ctl_wr(SDC *sdc, uint8_t val);
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void sdc_cshigh(SDC *sdc);
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void sdc_spi_wr(SDC *sdc, uint8_t val);
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void sdc_spi_wr(SDC *sdc, uint8_t val);
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uint8_t sdc_spi_rd(SDC *sdc);
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uint8_t sdc_spi_rd(SDC *sdc);
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@ -1,5 +1,12 @@
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# Accessing a MicroSD card
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# Accessing a MicroSD card
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Warning: this recipe is temporarily broken. The schema below hasn't yet been
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updated to work with the new SPI relay protocol. If you've already built an
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old design, use an earlier commit or work around it in the SPI driver it should
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only be a matter of testing the input value for zero-ness to decide whether we
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ping the CSLOW or CSHIGH port. If you haven't, wait a little bit before building
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one: the upcoming design is better.
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SD cards are great because they are accessible directly. No supporting IC is
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SD cards are great because they are accessible directly. No supporting IC is
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necessary. The easiest way to access them is through the SPI protocol.
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necessary. The easiest way to access them is through the SPI protocol.
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