2019-06-15 04:15:30 +10:00
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# Writing to a AT28 from Collapse OS
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## Goal
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Write in an AT28 EEPROM from within Collapse OS so that you can have it update
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itself.
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## Gathering parts
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2020-04-14 04:41:02 +10:00
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* A RC2014 Classic
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* `stage3.bin` from the base recipe
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2019-06-15 04:15:30 +10:00
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* An extra AT28C64B
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* 1x 40106 inverter gates
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* Proto board, RC2014 header pins, wires, IC sockets, etc.
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## Building the EEPROM holder
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The AT28 is SRAM compatible so you could use a RAM module for it. However,
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there is only one RAM module with the Classic version of the RC2014 and we
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need it to run Collapse OS.
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You could probably use the 64K RAM module for this purpose, but I don't have one
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and I haven't tried it. For this recipe, I built my own module which is the same
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as the regular ROM module but with `WR` wired and geared for address range
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`0x2000-0x3fff`.
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If you're tempted by the idea of hacking your existing RC2014 ROM module by
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wiring `WR` and write directly to the range `0x0000-0x1fff` while running it,
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be aware that it's not that easy. I was also tempted by this idea, tried it,
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but on bootup, it seems that some random `WR` triggers happen and it corrupts
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2019-11-05 06:45:10 +11:00
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the EEPROM contents. Theoretically, we could go around that by putting the AT28
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2019-06-15 04:15:30 +10:00
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in write protection mode, but I preferred building my own module.
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I don't think you need a schematic. It's really simple.
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2020-04-14 04:41:02 +10:00
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## Using the at28 driver
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2019-06-15 04:15:30 +10:00
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2020-04-14 04:41:02 +10:00
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The AT28 driver is at `drv/at28.fs` and is a pure forth source file so it's
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rather easy to set up from the base Stage 3 binary:
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2019-06-15 04:15:30 +10:00
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2020-04-14 04:41:02 +10:00
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cat ../stage3.bin ../pre.fs ../../../drv/at28.fs ../run.fs > os.bin
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../../../emul/hw/rc2014/classic os.bin
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2019-06-15 04:15:30 +10:00
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## Writing contents to the AT28
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2020-04-14 04:41:02 +10:00
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The driver provides `AT28!` which can be plugged in adev's `A!*`.
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2019-06-15 04:15:30 +10:00
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2020-04-14 04:41:02 +10:00
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It's not in the Stage 3 binary, but because it's a small piece of Forth code,
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let's just run its definition code:
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2019-06-15 04:15:30 +10:00
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2020-04-14 04:41:02 +10:00
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cat ../../../drv/at28.fs | ./stripfc | ./exec <tty device>
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2019-06-15 04:15:30 +10:00
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2020-04-14 04:41:02 +10:00
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Then, upload your binary to some place in memory, for example `a000`. To do so,
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run this from your modern computer:
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2019-06-15 04:15:30 +10:00
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2020-04-14 04:41:02 +10:00
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./upload <tty device> a000 <filename>
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2019-06-15 04:15:30 +10:00
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2020-04-14 04:41:02 +10:00
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Then, activate `AT28!` with `' AT28! A!* !` and then run
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`0xa000 0x2000 <size-of-bin> AMOVE`. `AT28!` checks every myte for integrity,
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so it there's no error, you should be fine. Your content is now on the EEPROM!
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2019-06-15 04:15:30 +10:00
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2020-04-14 04:41:02 +10:00
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Why not upload content directly to `0x2000` after having activated `AT28!`?
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Technically, you could. It was my first idea too. However, at the time of this
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writing, I always get weird mismatch errors about halfway through. Maybe that
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the ACIA interrupt does something wrong...
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