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100 lines
2.1 KiB
Forth
100 lines
2.1 KiB
Forth
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( ACIA
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Manage I/O from an asynchronous communication interface adapter
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(ACIA). provides "EMIT" to put c char on the ACIA as well as
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an input buffer. You have to call "~ACIA" on interrupt for
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this module to work well.
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CONFIGURATION
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ACIA_CTL: IO port for the ACIA's control registers
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ACIA_IO: IO port for the ACIA's data registers
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)
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0x20 CONSTANT ACIABUFSZ
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( Points to ACIA buf )
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(sysv) ACIA(
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( Points to ACIA buf end )
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(sysv) ACIA)
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( Read buf pointer. Pre-inc )
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(sysv) ACIAR>
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( Write buf pointer. Post-inc )
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(sysv) ACIAW>
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( This means that if W> == R>, buffer is full.
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If R>+1 == W>, buffer is empty. )
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(entry) ~ACIA
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AF PUSHqq,
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HL PUSHqq,
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DE PUSHqq,
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( Read our character from ACIA into our BUFIDX )
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ACIA_CTL INAn,
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0x01 ANDn, ( is ACIA rcv buf full? )
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JRZ, L2 FWR ( end, no, wrong interrupt cause. )
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ACIAW> @ LDHL(nn),
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( is it == to ACIAR>? )
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DE ACIAR> @ LDdd(nn),
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( carry cleared from ANDn above )
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DE SBCHLss,
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JRZ, L3 FWR ( end, buffer full )
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( buffer not full, let's write )
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ACIA_IO INAn,
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(HL) A LDrr,
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( advance W> )
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HL INCss,
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DE ACIAR) @ LDdd(nn),
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DE SUBHLss,
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JRNZ, L4 FWR ( skip )
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( end of buffer reached )
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ACIA( @ LDHL(nn),
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L4 FSET ( skip )
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ACIAW> @ LD(nn)HL,
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L3 FSET L2 FSET ( end )
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DE POPqq,
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HL POPqq,
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AF POPqq,
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EI,
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RETI,
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: ACIA$
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H@ DUP DUP ACIA( ! ACIAR> !
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1 + ACIAW> ! ( write index starts one position later )
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ACIABUFSZ ALLOT
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H@ ACIA) !
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( setup ACIA
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CR7 (1) - Receive Interrupt enabled
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CR6:5 (00) - RTS low, transmit interrupt disabled.
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CR4:2 (101) - 8 bits + 1 stop bit
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CR1:0 (10) - Counter divide: 64
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)
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0b10010110 ACIA_CTL PC!
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( setup interrupt )
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( 51 == INTJUMP )
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0xc3 0x51 RAM+ C! ( JP upcode )
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['] ~ACIA 0x52 RAM+ !
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(im1)
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;
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: KEY
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( As long as R> == W>-1, it means that buffer is empty )
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BEGIN ACIAR> @ 1 + ACIAW> @ = NOT UNTIL
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ACIAR> @ C@
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1 ACIAR> +!
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;
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: EMIT
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( As long at CTL bit 1 is low, we are transmitting. wait )
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BEGIN ACIA_CTL PC@ 0x02 AND UNTIL
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( The way is clear, go! )
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ACIA_IO SWAP PC!
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;
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