2020-11-15 10:00:31 +11:00
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( ----- 600 )
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Sega Master System Recipe
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602 VDP 610 PAD
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620 KBD 625 Ports
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( ----- 602 )
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( VDP Driver. requires TMS9918 driver. Load range B602-B604. )
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CREATE _idat
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0b00000100 C, 0x80 C, ( Bit 2: Select mode 4 )
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0b00000000 C, 0x81 C,
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0b00001111 C, 0x82 C, ( Name table: 0x3800, *B0 must be 1* )
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0b11111111 C, 0x85 C, ( Sprite table: 0x3f00 )
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0b11111111 C, 0x86 C, ( sprite use tiles from 0x2000 )
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0b11111111 C, 0x87 C, ( Border uses palette 0xf )
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0b00000000 C, 0x88 C, ( BG X scroll )
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0b00000000 C, 0x89 C, ( BG Y scroll )
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0b11111111 C, 0x8a C, ( Line counter (why have this?) )
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( ----- 603 )
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( Each row in ~FNT is a row of the glyph and there is 7 of
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them. We insert a blank one at the end of those 7. For each
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row we set, we need to send 3 zero-bytes because each pixel in
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the tile is actually 4 bits because it can select among 16
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palettes. We use only 2 of them, which is why those bytes
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always stay zero. )
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: _sfont ( a -- Send font to VDP )
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7 0 DO C@+ _data 3 _zero LOOP DROP
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( blank row ) 4 _zero ;
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2020-11-17 01:11:47 +11:00
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: CELL! ( c pos )
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2 * 0x7800 OR _ctl ( c )
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2020-11-17 02:05:48 +11:00
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0x20 - ( glyph ) 0x5e MOD _data ;
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2020-11-15 10:00:31 +11:00
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( ----- 604 )
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2020-11-17 02:05:48 +11:00
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: CURSOR! ( new old -- )
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( unset palette bit in old tile )
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2 * 1+ 0x7800 OR _ctl 0 _data
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( set palette bit for at specified pos )
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2 * 1+ 0x7800 OR _ctl 0x8 _data ;
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2020-11-15 10:00:31 +11:00
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: VDP$
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2020-11-17 03:11:30 +11:00
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9 0 DO _idat I 2 * + @ _ctl LOOP
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( blank screen ) 0x7800 _ctl COLS LINES * 2 * _zero
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2020-11-15 10:00:31 +11:00
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( palettes )
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0xc000 _ctl
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( BG ) 1 _zero 0x3f _data 14 _zero
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( sprite, inverted colors ) 0x3f _data 15 _zero
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0x4000 _ctl 0x5e 0 DO ~FNT I 7 * + _sfont LOOP
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( bit 6, enable display, bit 7, ?? ) 0x81c0 _ctl ;
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2020-11-17 02:05:48 +11:00
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: COLS 32 ; : LINES 24 ;
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2020-11-15 10:00:31 +11:00
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( ----- 610 )
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Pad driver - read input from MD controller
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Conveniently expose an API to read the status of a MD pad A.
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Moreover, implement a mechanism to input arbitrary characters
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from it. It goes as follow:
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* Direction pad select characters. Up/Down move by one,
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Left/Right move by 5
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* Start acts like Return
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* A acts like Backspace
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* B changes "character class": lowercase, uppercase, numbers,
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special chars. The space character is the first among special
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chars.
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* C confirms letter selection
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(cont.)
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( ----- 611 )
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This module is currently hard-wired to VDP driver, that is, it
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calls vdp's routines during (key) to update character
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selection.
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Load range: 632-637
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( ----- 612 )
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: _prevstat [ PAD_MEM LITN ] ;
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: _sel [ PAD_MEM 1+ LITN ] ;
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: _next [ PAD_MEM 2+ LITN ] ;
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( Put status for port A in register A. Bits, from MSB to LSB:
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Start - A - C - B - Right - Left - Down - Up
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Each bit is high when button is unpressed and low if button is
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pressed. When no button is pressed, 0xff is returned.
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This logic below is for the Genesis controller, which is modal.
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TH is an output pin that switches the meaning of TL and TR. When
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TH is high (unselected), TL = Button B and TR = Button C. When
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TH is low (selected), TL = Button A and TR = Start. )
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( ----- 613 )
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: _status
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1 _THA! ( output, high/unselected )
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_D1@ 0x3f AND ( low 6 bits are good )
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( Start and A are returned when TH is selected, in bits 5 and
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4. Well get them, left-shift them and integrate them to B. )
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0 _THA! ( output, low/selected )
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_D1@ 0x30 AND 2 LSHIFT OR ;
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( ----- 614 )
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: _chk ( c --, check _sel range )
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_sel C@ DUP 0x7f > IF 0x20 _sel C! THEN
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0x20 < IF 0x7f _sel C! THEN ;
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CREATE _ '0' C, ':' C, 'A' C, '[' C, 'a' C, 0xff C,
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: _nxtcls
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_sel @ _ BEGIN ( c a ) C@+ 2 PICK > UNTIL ( c a )
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1- C@ NIP _sel !
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;
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( ----- 615 )
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: _updsel ( -- f, has an action button been pressed? )
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_status _prevstat C@ OVER = IF DROP 0 EXIT THEN
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DUP _prevstat C! ( changed, update ) ( s )
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0x01 ( UP ) OVER AND NOT IF 1 _sel +! THEN
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0x02 ( DOWN ) OVER AND NOT IF -1 _sel +! THEN
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0x04 ( LEFT ) OVER AND NOT IF -5 _sel +! THEN
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0x08 ( RIGHT ) OVER AND NOT IF 5 _sel +! THEN
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0x10 ( BUTB ) OVER AND NOT IF _nxtcls THEN
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( update sel in VDP )
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2020-11-17 01:19:55 +11:00
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_chk _sel C@ XYPOS @ CELL!
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2020-11-15 10:00:31 +11:00
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( return whether any of the high 3 bits is low )
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0xe0 AND 0xe0 <
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;
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( ----- 616 )
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: (key)
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_next C@ IF _next C@ 0 _next C! EXIT THEN
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BEGIN _updsel UNTIL
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_prevstat C@
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0x20 ( BUTC ) OVER AND NOT IF DROP _sel C@ EXIT THEN
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0x40 ( BUTA ) AND NOT IF 0x8 ( BS ) EXIT THEN
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( If not BUTC or BUTA, it has to be START )
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0xd _next C! _sel C@
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;
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( ----- 617 )
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: PAD$
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0xff _prevstat C! 'a' _sel C! 0 _next C! ;
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( ----- 620 )
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( kbd - implement (ps2kc) for SMS PS/2 adapter )
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: (ps2kcA) ( for port A )
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( Before reading a character, we must first verify that there
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is something to read. When the adapter is finished filling its
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'164 up, it resets the latch, which output's is connected to
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TL. When the '164 is full, TL is low. Port A TL is bit 4 )
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_D1@ 0x10 AND IF 0 EXIT ( nothing ) THEN
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0 _THA! ( Port A TH output, low )
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_D1@ ( bit 3:0 go in 3:0 ) 0x0f AND ( n )
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1 _THA! ( Port A TH output, high )
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_D1@ ( bit 3:0 go in 7:4 ) 0x0f AND 4 LSHIFT OR ( n )
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2 _THA! ( TH input ) ;
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( ----- 621 )
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: (ps2kcB) ( for port B )
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( Port B TL is bit 2 )
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_D2@ 0x04 AND IF 0 EXIT ( nothing ) THEN
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0 _THB! ( Port B TH output, low )
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_D1@ ( bit 7:6 go in 1:0 ) 6 RSHIFT ( n )
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_D2@ ( bit 1:0 go in 3:2 ) 0x03 AND 2 LSHIFT OR ( n )
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1 _THB! ( Port B TH output, high )
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_D1@ ( bit 7:6 go in 5:4 ) 0xc0 AND 2 RSHIFT OR ( n )
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_D2@ ( bit 1:0 go in 7:6 ) 0x03 AND 6 LSHIFT OR ( n )
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2 _THB! ( TH input ) ;
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( ----- 622 )
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: (spie) DROP ; ( always enabled )
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2020-11-18 05:41:44 +11:00
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CODE (spix) ( x -- x, for port B ) HL POP, chkPS,
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( TR = DATA TH = CLK )
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CPORT_MEM LDA(i), 0xf3 ANDi, ( TR/TH output )
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H 8 LDri, BEGIN,
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0xbf ANDi, ( TR lo ) L RL, ( --> C )
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IFC, 0x40 ORi, ( TR hi ) THEN,
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CPORT_CTL OUTiA, ( clic! ) 0x80 ORi, ( TH hi )
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CPORT_CTL OUTiA, ( clac! )
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EXAFAF', CPORT_D1 INAi, ( Up Btn is B6 ) RLA, RLA,
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E RL, EXAFAF',
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0x7f ANDi, ( TH lo ) CPORT_CTL OUTiA, ( cloc! )
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H DECr, JRNZ, AGAIN, CPORT_MEM LD(i)A,
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L E LDrr, HL PUSH,
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;CODE
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2020-11-15 10:00:31 +11:00
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( ----- 625 )
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( Routines for interacting with SMS controller ports.
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Requires CPORT_MEM, CPORT_CTL, CPORT_D1 and CPORT_D2 to be
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defined. CPORT_MEM is a 1 byte buffer for CPORT_CTL. The last
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3 consts will usually be 0x3f, 0xdc, 0xdd. )
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( mode -- set TR pin on mode a on:
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0= output low 1=output high 2=input )
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CODE _TRA! HL POP, chkPS, ( B0 -> B4, B1 -> B0 )
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L RR, RLA, RLA, RLA, RLA, L RR, RLA,
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0x11 ANDi, L A LDrr, CPORT_MEM LDA(i),
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0xee ANDi, L ORr, CPORT_CTL OUTiA, CPORT_MEM LD(i)A,
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;CODE
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CODE _THA! HL POP, chkPS, ( B0 -> B5, B1 -> B1 )
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L RR, RLA, RLA, RLA, RLA, L RR, RLA, RLA,
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0x22 ANDi, L A LDrr, CPORT_MEM LDA(i),
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0xdd ANDi, L ORr, CPORT_CTL OUTiA, CPORT_MEM LD(i)A,
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;CODE
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( ----- 626 )
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CODE _TRB! HL POP, chkPS, ( B0 -> B6, B1 -> B2 )
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L RR, RLA, RLA, RLA, RLA, L RR, RLA, RLA, RLA,
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0x44 ANDi, L A LDrr, CPORT_MEM LDA(i),
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0xbb ANDi, L ORr, CPORT_CTL OUTiA, CPORT_MEM LD(i)A,
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;CODE
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CODE _THB! HL POP, chkPS, ( B0 -> B7, B1 -> B3 )
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L RR, RLA, RLA, RLA, RLA, L RR, RLA, RLA, RLA, RLA,
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0x88 ANDi, L A LDrr, CPORT_MEM LDA(i),
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0x77 ANDi, L ORr, CPORT_CTL OUTiA, CPORT_MEM LD(i)A,
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;CODE
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CODE _D1@ CPORT_D1 INAi, PUSHA, ;CODE
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CODE _D2@ CPORT_D2 INAi, PUSHA, ;CODE
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