collapseos/blk/208

Instructions list

r => A B C D E H L (HL)
d => BC DE HL AF/SP
c => CNZ CZ CNC CC CPO CPE CP CM

LD [rr, ri, di, (i)HL, HL(i), d(i), (i)d, rIXY, IXYr,
    (DE)A, A(DE), (i)A, A(i)]
ADD [r, i, HLd, IXd, IXIX, IYd, IYIY]
ADC [r, HLd]
CP  [r, i, (IXY+)]
SBC [r, HLd]
SUB [r, i]
PUSH  POP
INC [r, d, (IXY+)]    DEC [r, d, (IXY+)]
AND [r, i] OR [r, i]   XOR [r, i]                       (cont.)
Copy z80a.fs to disk blocks I don't remove z80a.fs yet because build process needs it, but that will change shortly. 2020-04-20 10:36:13 +10:00			`Instructions list`

			`r => A B C D E H L (HL)`
z80a: make mnemonic names more uniform across assemblers Initially, I used the same letters as those used in the z80 ref docs, but it makes the different assemblers harder to use than they should. Having consistent "argtype" rules across assemblers should help. 2020-06-28 12:01:56 +10:00			`d => BC DE HL AF/SP`
			`c => CNZ CZ CNC CC CPO CPE CP CM`
Copy z80a.fs to disk blocks I don't remove z80a.fs yet because build process needs it, but that will change shortly. 2020-04-20 10:36:13 +10:00
z80a: make mnemonic names more uniform across assemblers Initially, I used the same letters as those used in the z80 ref docs, but it makes the different assemblers harder to use than they should. Having consistent "argtype" rules across assemblers should help. 2020-06-28 12:01:56 +10:00			`LD [rr, ri, di, (i)HL, HL(i), d(i), (i)d, rIXY, IXYr,`
acia: simplify driver The previous approach of maintaining R> and W> pointers was conceptually simple, but made INT handler code actually quite complex. Now, we maintain indexes instead. It's much easier to perform bounds checks and to compare for equality, something we have to do quick in the INT handler. 2020-08-15 12:51:27 +10:00			`(DE)A, A(DE), (i)A, A(i)]`
z80a: make mnemonic names more uniform across assemblers Initially, I used the same letters as those used in the z80 ref docs, but it makes the different assemblers harder to use than they should. Having consistent "argtype" rules across assemblers should help. 2020-06-28 12:01:56 +10:00			`ADD [r, i, HLd, IXd, IXIX, IYd, IYIY]`
			`ADC [r, HLd]`
			`CP [r, i, (IXY+)]`
			`SBC [r, HLd]`
			`SUB [r, i]`
			`PUSH POP`
			`INC [r, d, (IXY+)] DEC [r, d, (IXY+)]`
			`AND [r, i] OR [r, i] XOR [r, i] (cont.)`