bugfixes and stuff

This commit is contained in:
Izaya 2017-02-12 01:57:00 +00:00
parent a06d1c5f76
commit c98c736360
2 changed files with 3 additions and 13 deletions

View File

@ -1,4 +1,3 @@
local MEMSIZE=16
if not digiline then
print("Digilines not found.")
return
@ -12,16 +11,7 @@ end
print("Loading.")
local function t410_set_meta(pos)
local meta = minetest.get_meta(pos)
local ms = ""
for i = 1, MEMSIZE do
ms = ms .. "0\n"
end
meta:set_string("mem",ms)
meta:set_string("channel","Default")
meta:set_int("startaddr",0)
meta:set_string("formspec","size[2,4]\nfield[0,1;2.9,1;addr;Address;]\nfield[0,2;2.9,1;data;Data;]\nbutton[0,3;2,1;write;Write]")
--
minetest.get_meta(pos):set_string("formspec","size[2,4]\nfield[0,1;2.9,1;addr;Address;]\nfield[0,2;2.9,1;data;Data;]\nbutton[0,3;2,1;write;Write]")
end
minetest.register_node("test3d_t410:t410", {
description = "T410 Memory Access Console",
@ -30,7 +20,7 @@ minetest.register_node("test3d_t410:t410", {
groups = {snappy=1,choppy=2,oddly_breakable_by_hand=2,flammable=3},
on_receive_fields = function(pos,_,fields,sender)
if fields.addr == nil then return end
digiline:receptor_send(pos, digiline.rules.default, fields.addr, tonumber(fields.data or 0))
digiline:receptor_send(pos, digiline.rules.default, fields.addr, tonumber(fields.data) or 0)
print("Set "..fields.addr.." to "..fields.data)
end,
digiline = {

View File

@ -54,7 +54,7 @@ minetest.register_node("test3d_t416:t416", {
digiline = {
receptor = {},
effector = {
action = t416_digiline_receive
action = function (a,b,c,d) pcall(t416_digiline_receive,a,b,c,d) end
}
},
on_receive_fields = function(pos,_,fields,sender)