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Commit Graph

1402 Commits

Author SHA1 Message Date
Virgil Dupras
eec9549bde Make rdln use system RAM 2020-05-14 14:26:56 -04:00
Virgil Dupras
b606dbf9af rc2014: move xcomp unit's contents to blkfs 2020-05-14 12:29:34 -04:00
Virgil Dupras
a8e8204eba trs80: adapt recipe to single stage xcomp 2020-05-14 12:08:17 -04:00
Virgil Dupras
8a58449776 Add word ERR 2020-05-14 11:57:26 -04:00
Virgil Dupras
303b34b483 ti84: adapt recipe to single stage xcomp 2020-05-14 11:36:10 -04:00
Virgil Dupras
0703da928e rc2014: adapt recipe to single stage xcomp
It's now much easier...
2020-05-14 11:32:51 -04:00
Virgil Dupras
b0258f5bba Fix tests 2020-05-14 10:58:41 -04:00
Virgil Dupras
5446afd87d emul: rename stage2 to stage 2020-05-14 10:55:39 -04:00
Virgil Dupras
9d4d9de511 emul: remove stage1 2020-05-14 10:49:24 -04:00
Virgil Dupras
e6bac985fa Cross-compiles in a single stage!
Finally got rid of the XPACKed core and managed to cross-compile
all core words, which greatly simplifies the bootstrapping process.
2020-05-14 10:17:38 -04:00
Virgil Dupras
68262f925b Almost done De-XPACKing! 2020-05-14 09:58:48 -04:00
Virgil Dupras
640e3321fc Move a bunch of words from XPACKed core to xcomp core 2020-05-14 09:54:33 -04:00
Virgil Dupras
4143e2a699 Improve late-stage xcomp 2020-05-14 09:45:42 -04:00
Virgil Dupras
179c66be8a Move a bunch of words from XPACKed core to xcomp core 2020-05-14 08:50:43 -04:00
Virgil Dupras
74896051bb Move BOOT, (boot<) and INTEPRET to high xcomp
Saves us an (ok) indirection and will save us more soon.
2020-05-14 08:45:01 -04:00
Virgil Dupras
b17bd4dca0 wip 2020-05-14 08:33:06 -04:00
Virgil Dupras
40a756cf1c Move a bunch of words from XPACKed core to xcomp core 2020-05-14 08:18:53 -04:00
Virgil Dupras
51997533ff Move a bunch of words from XPACKed core to xcomp core 2020-05-14 07:58:55 -04:00
Virgil Dupras
80d730318a Simplify LOAD's INTERPRET exit mechanism 2020-05-13 22:55:52 -04:00
Virgil Dupras
2e9e7047bf Make INTERPRET break on ASCII EOT
This should allow me to simplify LOAD's exit mechanism on block
end.
2020-05-13 21:44:46 -04:00
Virgil Dupras
052d59a3a2 TOWORD: tiny optimization
My mind is getting forthy.
2020-05-13 20:59:00 -04:00
Virgil Dupras
33d37d4ce9 WORD: don't overwrite RAM on words over 31 chars
This allows me to reclaim some RAM I hadn't even noticed I
needlessly monopolise.
2020-05-13 20:39:53 -04:00
Virgil Dupras
bd1e76ec5b Gather all RC2014 drivers into a single "RC2014 Recipe section" 2020-05-13 14:56:38 -04:00
Virgil Dupras
9b85961093 Rename "Core words" to "XPACKed core"
Now that this section is so small, I think I can see a possibility
for cross-compiling Collapse OS entirely, which would be great
because we could get rid of the relinker.
2020-05-13 14:31:56 -04:00
Virgil Dupras
76037ca1e7 Simplify boot process
That INIT thing is unnecessary.
2020-05-13 14:19:54 -04:00
Virgil Dupras
bb77cd0759 xcomp: add overrides into a loadable block
Makes xcomp.fs units shorter.
2020-05-13 13:33:24 -04:00
Virgil Dupras
0434d02818 xcomp: implement X['] 2020-05-13 13:24:58 -04:00
Virgil Dupras
7c20501f27 Move core's blk to xcomp core (low and high)
TODO: implement X['] so that I can remove those XCURRENT patterns.
2020-05-13 10:50:46 -04:00
Virgil Dupras
d956386e9b Move core's readln to xcomp core (high) 2020-05-13 09:28:32 -04:00
Virgil Dupras
029df00ad4 Free some space for xcomp core 2020-05-13 09:11:57 -04:00
Virgil Dupras
56af516d07 Move core's fmt to xcomp core (high) 2020-05-13 09:02:44 -04:00
Virgil Dupras
e2e9faef2c Move a bunch of words from core to xcomp core 2020-05-13 08:50:07 -04:00
Virgil Dupras
d6a3e79394 Free some space for xcomp core low 2020-05-13 08:00:49 -04:00
Virgil Dupras
ddf23e3d02 Move a bunch of words from core to xcomp core 2020-05-13 07:55:36 -04:00
Virgil Dupras
6a5ff3adcb rc2014: unify SD Card driver
Now more low/high layers.
2020-05-12 21:48:29 -04:00
Virgil Dupras
cbf5baf3b6 Pack core words a bit
This leaves space for xcomp-core which is growing.
2020-05-12 21:27:06 -04:00
Virgil Dupras
dfe474ca0e xcomp: add XCOMPILE and X[COMPILE]
This allows us to move words like ABORT" to xcomp-core, which is
I think the last roadblock before being able to unify all drivers
into a single xcomp layer.
2020-05-12 21:08:18 -04:00
Virgil Dupras
44b065ff99 ti84: unify drivers
No more low/high
2020-05-12 12:41:47 -04:00
Virgil Dupras
1094ec9c57 Make DO..LOOP stable
DO and LOOP now only compile words from stable ABI, which make them
suitable for xcomp. This will greatly simplify driver writing and
allow us to mostly avoid the low/high divide in drivers.

LEAVE is still xcomp-incompatible though.

This make us very very tight for "<0x100" limit for literal words.
Hopefully, we won't need more stuff in that area of the binary...
2020-05-12 10:40:59 -04:00
Virgil Dupras
b760c2d353 SCPY: don't copy the NULL
This makes [entry] much simpler. Also, remove unused LITS word.
2020-05-12 07:36:20 -04:00
Virgil Dupras
231d727598 Move a few words from core to xcomp core 2020-05-12 07:21:34 -04:00
Virgil Dupras
9ad7ee7a4b Rename Inner core to Cross-compiled core
And refreshed description.
2020-05-11 22:23:26 -04:00
Virgil Dupras
6beb082e29 acia: make wholly cross compilable 2020-05-11 21:52:44 -04:00
Virgil Dupras
da371451cc Replace INITIAL_SP with PS_ADDR conf
Now I struggle to remember why I ever did things they way I did.
There must have been a reason...
2020-05-11 21:08:24 -04:00
Virgil Dupras
73482e7ea1 Reword root block
Usage of "LIST" wasn't explicit enough for a complete newcomer. I
hope that with this wording, anyone can figure out how to navigate
blocks and learn the system.
2020-05-11 20:12:21 -04:00
Virgil Dupras
73b6d9905e Add 7x7 font 2020-05-10 21:37:23 -04:00
Virgil Dupras
4e1fe916be ti84: working! 2020-05-10 14:56:07 -04:00
Virgil Dupras
2791dd992e ti84: offset binary by 0x100 to free space for TI-specific stuff
Not yet tried on real hardware, but we should be getting pretty
close...
2020-05-10 14:06:01 -04:00
Virgil Dupras
62ae1012df ti84: allow case select during a-lock with 2nd mode 2020-05-10 11:39:10 -04:00
Virgil Dupras
a6aba40327 ti84: fix a-lock debouncing bug
Yup, it was a deja vu. I remember now.
2020-05-10 11:26:58 -04:00