18 Commits

Author	SHA1	Message	Date
Virgil Dupras	98ca338aba	avra: add LD/ST	2019-12-22 21:50:20 -05:00
Virgil Dupras	b955a67daa	avra: add TST	2019-12-22 19:24:36 -05:00
Virgil Dupras	6e1e8e0e59	avra: add LSL	2019-12-22 18:36:15 -05:00
Virgil Dupras	8ded02bc78	avra: fix misordered MOV, MUL, NEG and NOP	2019-12-22 18:35:08 -05:00
Virgil Dupras	f54e10f9fd	avra: add CALL and JMP	2019-12-22 15:54:46 -05:00
Virgil Dupras	10b925e0e0	avra: add BCLR and BSET	2019-12-22 15:11:15 -05:00
Virgil Dupras	1771ee8da7	avra: add SER	2019-12-22 15:01:08 -05:00
Virgil Dupras	0a9ac27cf6	avra: add SBIC and SBIS	2019-12-22 14:55:38 -05:00
Virgil Dupras	a9dcba5793	avra: add CBR instruction	2019-12-22 14:45:10 -05:00
Virgil Dupras	c968995ec0	avra: add CBI and SBI ... This completes instruction support for the Blink tn45 example.	2019-12-15 20:51:31 -05:00
Virgil Dupras	2652c81519	avra: make CLR work properly	2019-12-15 16:43:32 -05:00
Virgil Dupras	aa8df95f7d	Add "avr/" includes folder ... Also, add a "real world" example in AVRA tests, a blink program on a ATtiny45. Some instructions are commented out because they aren't implemented yet, but not many. The output of the program has been verified against AVRA's own output.	2019-12-15 09:38:01 -05:00
Virgil Dupras	64935d8b40	avra: add IN and OUT instructions	2019-12-15 08:43:59 -05:00
Virgil Dupras	fa75f30ffb	avra: add RJMP and RCALL instructions	2019-12-14 12:28:27 -05:00
Virgil Dupras	a5efc695e9	avra: add "Rd + bit" instructions	2019-12-14 09:33:46 -05:00
Virgil Dupras	c696fcbce4	avra: add "with immediate" instructions	2019-12-14 09:05:38 -05:00
Virgil Dupras	4b9712a224	avra: add branching instructions	2019-12-13 22:49:15 -05:00
Virgil Dupras	57c1a10434	avra: first steps	2019-12-13 17:38:40 -05:00