Working on programming AVR chips exposes a glaring omission in my
first design of the SPI Relay: not allowing multiple devices make
this task hard. I constantly have to unplug my SD card before, plug
the AVR chip holder, then play a bit, then unplug the AVR holder,
then replug the SD card...
My prototype for a SPI relay design is built, but I haven't tested
it yet. I need to adapt the code first, which is what I do here.
When the prototype is tested, I'll update the SDC recipe with a new
schema.
Only its jump at 0x33 remains.
I've also fixed a strange offset oddity in 8086's (n) placement.
It was off by 2, but strangely, it ran properly. Anyway, now it's
fixed.
Previously, recipes that began spitting binary contents before
loading block 282 would end up with VARIABLE code in their binary,
thus breaking them. We fix this by making this loading process
2-part.
This commit adds ?DUP IF guards to MOVE and MOVE- that make them exit
when u is 0. Without these guards a DO loop was executed 65535 times
instead of 0.
In particular, this fixes a crash when "105 LOAD I " is executed
immediately after boot. Block editor word "I" passes IBUF length (0)
to MOVE- and MOVE in this case, causing a crash.
Instead of having wordref point to core word routines, I made them
into word 4 word types. It liberates space into the stable ABI and
should make porting to other arches easier.
I'm also thinking of combining word type with the namelen field
for precious bytes saving, but not now...
It was useful when we still had the relinker, but now it has no use.
I was waiting a bit to see if the distinction would be useful again,
but it seems like it won't.
There wasn't much of a reason to leave a loop early on 0x0d or null.
The idea was that once you have a CR or null, the rest is garbage
and you shouldn't see it.
However, it brought a problem: In VE, you couldn't insert characters
past that limit. It would be written, but never displayed. So let's
get rid of this logic and simply always display a 64x16 grid.
I'm not sure why I chose null-terminated initially. Probably because
the z80asm version had null-terminated strings.
Length-prefixes strings are the traditional form of strings in Forth
and it's a bit easier to work with them with traditional forth words
when they're under this form.
I'm planning on going back to 8-bit branching. 16-bit br cells incur
a non-negligible penalty and, while at first 64 words (128 bytes
forward or backward) seemed a bit limiting, I now don't see why one
would ever construct such a big branch. It would be un-forthy.
Also, I looked at using BC instead of IY to hold IP and the transition
would be a lot easier with 8-bit branching.
In this commit, all I do is add overflow checks in IF. The mechanic
below doesn't change. I'll give myself some time to think it over so
that I avoid yet another back and forth.
Prebiously, when encountering an error during a : ; definition from
input buffer, because the input buffer wasn't flushed, we would continue
interpreting and quit the whole program when encountering ;.
