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Make br cells 1 byte wide
The 1 byte limitation has been effective for a while now, but I hadn't made the move yet, I wanted to see if the limitation would cause me problems. It doesn't. Doing this now slightly facilitates the IY->BC move in z80. Bootstrapping: if you try to recreate the CVM binary from the previous commit with this code, you'll have bootstrapping problems. The first bootstrap will compile a binary with 2-bytes wide cells but branching conditionals that yields 1-byte cells. That's bad. I got around the issue by temporarily inserting a "397 399 LOADR" instruction in cvm/xcomp.fs, right before the xcomp overrides. This way, I force 1-byte cells everywhere on the first compiliation, which then allows me to apply the logic change in cvm/vm.c and have a properly running binary.
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bf4ab0f1b4
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a7dcb522c2
7
blk/297
7
blk/297
@ -1,7 +1,8 @@
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CODE (br)
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L1 BSET ( used in ?br and loop )
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PC ORG @ 0x3d + ! ( stable ABI JP )
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E 0 IY+ LDrIXY, D 1 IY+ LDrIXY,
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E 0 IY+ LDrIXY, D 0 LDri,
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7 E BIT, IFNZ, D DECr, THEN,
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DE ADDIYd,
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;CODE
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CODE (?br)
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@ -9,6 +10,6 @@ PC ORG @ 0x41 + ! ( stable ABI JP )
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HL POP,
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HLZ,
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JRZ, L1 BWR ( br + 1. False, branch )
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( True, skip next 2 bytes and don't branch )
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IY INCd, IY INCd,
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( True, skip next byte and don't branch )
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IY INCd,
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;CODE
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2
blk/298
2
blk/298
@ -6,7 +6,7 @@ PC ORG @ 0x45 + ! ( stable ABI JP )
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A 1 IX+ LDrIXY, 1 IX- CP(IXY+), JRNZ, L1 BWR ( branch )
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( don't branch )
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IX DECd, IX DECd, IX DECd, IX DECd,
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IY INCd, IY INCd,
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IY INCd,
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;CODE
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2
blk/397
2
blk/397
@ -1,7 +1,7 @@
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( Now we have "as late as possible" stuff. See B70 and B260. )
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: _bchk DUP 0x7f + 0xff > IF LIT< br-ovfl (print) ABORT THEN ;
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: DO 0x33 ( 2>R ) , H@ ; IMMEDIATE
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: LOOP 0x43 ( loop ) , H@ - _bchk , ; IMMEDIATE
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: LOOP 0x43 ( loop ) , H@ - _bchk C, ; IMMEDIATE
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( LEAVE is implemented in low xcomp )
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: LITN 0x23 ( n ) , , ;
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( gets its name at the very end. can't comment afterwards )
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8
blk/398
8
blk/398
@ -1,12 +1,12 @@
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: IF ( -- a | a: br cell addr )
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0x3f ( ?br ) , H@ 2 ALLOT ( br cell allot )
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0x3f ( ?br ) , H@ 1 ALLOT ( br cell allot )
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; IMMEDIATE
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: THEN ( a -- | a: br cell addr )
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DUP H@ -^ _bchk SWAP ( a-H a ) !
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DUP H@ -^ _bchk SWAP ( a-H a ) C!
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; IMMEDIATE
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: ELSE ( a1 -- a2 | a1: IF cell a2: ELSE cell )
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0x3b ( br ) ,
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2 ALLOT
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1 ALLOT
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[COMPILE] THEN
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H@ 2- ( push a. -2 for allot offset )
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H@ 1- ( push a. 1- for allot offset )
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; IMMEDIATE
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4
blk/399
4
blk/399
@ -1,7 +1,7 @@
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: LIT< 0x2b ( s ) , WORD DUP C@ 1+ MOVE, ; IMMEDIATE
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: BEGIN H@ ; IMMEDIATE
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: AGAIN 0x3b ( br ) , H@ - _bchk , ; IMMEDIATE
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: UNTIL 0x3f ( ?br ) , H@ - _bchk , ; IMMEDIATE
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: AGAIN 0x3b ( br ) , H@ - _bchk C, ; IMMEDIATE
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: UNTIL 0x3f ( ?br ) , H@ - _bchk C, ; IMMEDIATE
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: [ INTERPRET ; IMMEDIATE
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: ] R> DROP ;
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: COMPILE ' LITN ['] , , ; IMMEDIATE
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2
blk/753
2
blk/753
@ -1,7 +1,7 @@
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: OP1 CREATE C, DOES> C@ A, ;
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0xc3 OP1 RETn, 0xfa OP1 CLI, 0xfb OP1 STI,
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0xf4 OP1 HLT, 0xfc OP1 CLD, 0xfd OP1 STD,
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0x90 OP1 NOP,
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0x90 OP1 NOP, 0x98 OP1 CBW,
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0xf3 OP1 REPZ, 0xf2 OP1 REPNZ, 0xac OP1 LODSB,
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0xad OP1 LODSW, 0xa6 OP1 CMPSB, 0xa7 OP1 CMPSW,
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0xa4 OP1 MOVSB, 0xa5 OP1 MOVSW, 0xae OP1 SCASB,
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7
blk/806
7
blk/806
@ -2,11 +2,12 @@
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H@ 4 + XCURRENT ! ( make next CODE have 0 prev field )
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CODE (br) L1 BSET ( used in ?br )
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PC 0x3f - ORG @ 0x3d + ! ( stable abi )
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DI DX MOVxx, DI [DI] MOVx[], DX DI ADDxx,
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DI DX MOVxx, AL [DI] MOVr[], AH AH XORrr, CBW,
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DX AX ADDxx,
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;CODE
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CODE (?br)
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PC 0x43 - ORG @ 0x41 + ! ( stable abi )
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AX POPx, AX AX ORxx, JZ, L1 @ RPCs, ( False, branch )
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( True, skip next 2 bytes and don't branch )
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DX INCx, DX INCx,
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( True, skip next byte and don't branch )
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DX INCx,
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;CODE
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2
blk/807
2
blk/807
@ -5,5 +5,5 @@ PC 0x47 - ORG @ 0x45 + ! ( stable abi )
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AX [BP] 0 MOVx[]+, AX [BP] -2 CMPx[]+,
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JNZ, L1 @ RPCs, ( branch )
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( don't branch )
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BP 4 SUBxi, DX INCx, DX INCx,
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BP 4 SUBxi, DX INCx,
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;CODE
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BIN
cvm/forth.bin
BIN
cvm/forth.bin
Binary file not shown.
10
cvm/vm.c
10
cvm/vm.c
@ -119,13 +119,17 @@ static word find(word daddr, word waddr) {
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}
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static void EXIT() { vm.IP = popRS(); }
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static void _br_() { vm.IP += gw(vm.IP); };
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static void _cbr_() { if (!pop()) { _br_(); } else { vm.IP += 2; } };
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static void _br_() {
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word off = vm.mem[vm.IP];
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if (off > 0x7f ) { off -= 0x100; }
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vm.IP += off;
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}
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static void _cbr_() { if (!pop()) { _br_(); } else { vm.IP++; } }
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static void _loop_() {
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word I = gw(vm.RS); I++; sw(vm.RS, I);
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if (I == gw(vm.RS-2)) { // don't branch
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popRS(); popRS();
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vm.IP += 2;
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vm.IP++;
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} else { // branch
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_br_();
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}
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