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sms/kbd: continue advancing on ps2ctl rewrite
Still binary matching. Next step is branching support.
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parent
177e70580f
commit
63dec372ce
1
blk/662
1
blk/662
@ -2,6 +2,7 @@
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: _r8c DUP 7 > IF _oor THEN ;
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: _r32c DUP 31 > IF _oor THEN ;
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: _r16+c _r32c DUP 16 < IF _oor THEN ;
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: _r64c DUP 63 > IF _oor THEN ;
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: _r256c DUP 255 > IF _oor THEN ;
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: _Rdp ( op rd -- op', place Rd ) 4 LSHIFT OR ;
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6
blk/664
6
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@ -7,3 +7,9 @@
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0x14 OPRdRr CP, 0x04 OPRdRr CPC, 0x10 OPRdRr CPSE,
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0x24 OPRdRr EOR, 0x2c OPRdRr MOV, 0x9c OPRdRr MUL,
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0x28 OPRdRr OR, 0x08 OPRdRr SBC, 0x18 OPRdRr SUB,
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( 0000 0AAd dddd AAAA )
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: OPRdA CREATE C, DOES> C@ ( rd A op )
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OVER _r64c 0x30 AND 3 RSHIFT OR ( rd A op' )
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8 LSHIFT OR 0xff0f AND ( rd op' ) SWAP _r32c _Rdp A,, ;
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0xb0 OPRdA IN, 0xb8 OPRdA _ : OUT, SWAP _ ;
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3
blk/667
3
blk/667
@ -8,3 +8,6 @@
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ROT _r32c _Rdp SWAP _r8c OR A,, ;
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0b1111100000000000 OPRdb BLD, 0b1111101000000000 OPRdb BST,
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0b1111110000000000 OPRdb SBRC, 0b1111111000000000 OPRdb SBRS,
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( special cases )
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: CLR, DUP EOR, ; : TST, DUP AND, ;
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@ -32,10 +32,23 @@ Y: pointer to the memory location where the next scan code from
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ps/2 will be written.
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Z: pointer to the next scan code to push to the 595 )
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0x0060 CONSTANT SRAM_START
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0x015f CONSTANT RAMEND
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0x3d CONSTANT SPL
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0x3e CONSTANT SPH
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0x11 CONSTANT GPIOR0
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0x35 CONSTANT MCUCR
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0x33 CONSTANT TCCR0B
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0x3b CONSTANT GIMSK
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0x16 CONSTANT PINB
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0x17 CONSTANT DDRB
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0x18 CONSTANT PORTB
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2 CONSTANT CLK
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1 CONSTANT DATA
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3 CONSTANT CP
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0 CONSTANT LQ
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4 CONSTANT LR
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0x100-100 CONSTANT TIMER_INITVAL
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H@ ORG !
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L1 FLBL, ( main )
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@ -51,3 +64,35 @@ RETI,
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RJMPOP L1 FLBL! ( main )
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16 RAMEND 0xff AND LDI,
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SPL 16 OUT,
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16 RAMEND 8 RSHIFT LDI,
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SPH 16 OUT,
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( init variables )
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18 CLR,
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GPIOR0 18 OUT,
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( Setup int0
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INT0, falling edge )
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16 0x02 ( ISC01 ) LDI,
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MCUCR 16 OUT,
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( Enable INT0 )
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16 0x40 ( INT0 ) LDI,
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GIMSK 16 OUT,
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( Setup buffer )
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29 ( YH ) CLR,
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28 ( YL ) SRAM_START 0xff AND LDI,
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31 ( ZH ) CLR,
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30 ( ZL ) SRAM_START 0xff AND LDI,
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( Setup timer. We use the timer to clear up "processbit"
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registers after 100us without a clock. This allows us to start
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the next frame in a fresh state. at 1MHZ, no prescaling is
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necessary. Each TCNT0 tick is already 1us long. )
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16 0x01 ( CS00 ) LDI, ( no prescaler )
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TCCR0B 16 OUT,
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( init DDRB )
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DDRB CP SBI,
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PORTB LR CBI,
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DDRB LR SBI,
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SEI,
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L1 LBL! ( loop )
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