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recipes/rc2014/ps2: don't alter SREG in hdlPCINT
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@ -45,8 +45,8 @@
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; *** Sending to the 595 ***
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;
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; Whenever a scan code is read from the 595, CE goes low and triggers a PCINT
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; on PB4. When we get it, we clear the R2 flag to indicate that we're ready to
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; send a new scan code to the 595.
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; on PB4. When we get it, we clear the GPIOR0/1 flag to indicate that we're
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; ready to send a new scan code to the 595.
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;
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; Because that CE flip/flop is real fast (375ns), it requires us to run at 8MHz.
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;
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@ -60,8 +60,13 @@
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; *** Register Usage ***
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;
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; R2: When set, indicate that the 595 holds a value that hasn't been read by the
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; z80 yet.
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; GPIOR0 flags:
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; 0 - when set, indicates that the DATA pin was high when we received a
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; bit through INT0. When we receive a bit, we set flag T to indicate
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; it.
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; 1 - When set, indicate that the 595 holds a value that hasn't been read
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; by the z80 yet.
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;
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; R16: tmp stuff
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; R17: recv buffer. Whenever we receive a bit, we push it in there.
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; R18: recv step:
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@ -70,8 +75,6 @@
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; - 2: awaiting parity bit
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; - 3: awaiting stop bit
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; it reaches 11, we know we're finished with the frame.
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; R19: when set, indicates that the DATA pin was high when we received a bit
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; through INT0. When we receive a bit, we set flag T to indicate it.
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; R20: data being sent to the 595
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; Y: pointer to the memory location where the next scan code from ps/2 will be
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; written.
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@ -89,21 +92,22 @@
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rjmp hdlINT0
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rjmp hdlPCINT
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; Read DATA and set R19 if high. Then, set flag T.
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; Read DATA and set GPIOR0/0 if high. Then, set flag T.
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; no SREG fiddling because no SREG-modifying instruction
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hdlINT0:
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sbic PINB, DATA ; DATA clear? skip next
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ser r19
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sbi GPIOR0, 0
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set
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reti
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; Only PB4 is hooked to PCINT and we don't bother checking the value of the PB4
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; pin: things go too fast for this.
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; no SREG fiddling because no SREG-modifying instruction
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hdlPCINT:
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; SRCLR has been triggered. Let's trigger RCLK too.
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sbi PORTB, RCLK
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cbi PORTB, RCLK
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clr r2 ; 595 is now free
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cbi GPIOR0, 1 ; 595 is now free
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reti
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main:
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@ -120,9 +124,9 @@ main:
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; init variables
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clr r2
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clr r19
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clr r18
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out GPIOR0, r18
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; Setup int0/PCINT
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; INT0, falling edge
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@ -156,8 +160,9 @@ loop:
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; Process the data bit received in INT0 handler.
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processbit:
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mov r16, r19 ; backup r19 before we reset T
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clr r19
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in r16, GPIOR0 ; backup GPIOR0 before we reset T
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andi r16, 0x1 ; only keep the first flag
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cbi GPIOR0, 0
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clt ; ready to receive another bit
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; Which step are we at?
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@ -210,8 +215,8 @@ processbits2:
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; send next scan code in buffer to 595, MSB.
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sendTo595:
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tst r2
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brne loop ; non-zero? 595 is "busy". Don't send.
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sbic GPIOR0, 1
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rjmp loop ; flag 1 set? 595 is "busy". Don't send.
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; We disable any interrupt handling during this routine. Whatever it
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; is, it has no meaning to us at this point in time and processing it
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; might mess things up.
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@ -246,8 +251,8 @@ sendTo595Loop:
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; release PS/2
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cbi DDRB, DATA
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; Set R2 to "595 is busy"
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inc r2
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; Set GPIOR0/1 to "595 is busy"
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sbi GPIOR0, 1
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; toggle RCLK
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sbi PORTB, RCLK
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