1
0
mirror of https://github.com/hsoft/collapseos.git synced 2024-12-25 04:48:06 +11:00

Move AVR programmer from B690 to B160

Also, remove leftovers from previous move.
This commit is contained in:
Virgil Dupras 2020-09-21 19:58:24 -04:00
parent faf088b397
commit 037c10fc57
12 changed files with 9 additions and 86 deletions

View File

@ -3,11 +3,10 @@ MASTER INDEX
005 Z80 assembler 030 8086 assembler
050 AVR assembler 70-99 unused
100 Block editor 120 Visual Editor
160-259 unused 260 Cross compilation
160 AVR SPI programmer
170-259 unused 260 Cross compilation
280 Z80 boot code 350 Core words
410 PS/2 keyboard subsystem 420 SD Card subsystem
440-519 unused 520 Fonts
550-689 unused
690 AVR SPI programmer
700-799 unused
550-799 unused
800 8086 boot code

View File

@ -1,3 +1,4 @@
( AVR Programmer, load range 160-162. doc/avr.txt )
( page size in words, 64 is default on atmega328P )
CREATE aspfpgsz 64 ,
VARIABLE aspprevx

View File

View File

View File

@ -1,5 +0,0 @@
AVR assembler
651 Guide 655 Instructions list
660 Loader 661-672 Code
672 Common AVR consts

16
blk/651
View File

@ -1,16 +0,0 @@
This assembler works very much like Z80 assembler (B200) so
refer to this documentation first. Here, we document specifici-
ties.
All mnemonics in AVR have a single signature. Therefore, we
don't need any "argtype" suffixes.
Registers are referred to with consts R0-R31. There is
X, Y, Z, X+, Y+, Z+, X-, Y-, Z- for appropriate ops (LD, ST).
XL, XH, YL, YH, ZL, ZH are simple aliases to R26-R31.
Branching works differently. Instead of expecting a byte to be
written after the naked op, branching words expect a displace-
ment argument.
(cont.)

View File

@ -1,9 +0,0 @@
This is because there's bitwise ORing involved in the creation
of the final opcode, which makes z80a's approach impractical.
This makes labelling a bit different too. Instead of expecting
label words after the naked branching op, we rather have label
words expecting branching wordref as an argument. Examples:
L2 ' BRTS FLBL! ( branch forward to L2 )
L1 ' RJMP LBL, ( branch backward to L1 )

16
blk/655
View File

@ -1,16 +0,0 @@
AVR instructions list
OPRd (B663)
ASR COM DEC INC LAC LAS LAT LSR NEG POP PUSH
ROR SWAP XCH
OPRdRr (B664)
ADC ADD AND CP CPC CPSE EOR MOV MUL OR SBC
SUB
OPRdA (B664)
IN OUT
OPRdK (B665)
ANDI CPI LDI ORI SBCI SBR SUBI
(cont.)

16
blk/656
View File

@ -1,16 +0,0 @@
OPAb (B665)
CBI SBI SBIC SBIS
OPNA (B666)
BREAK CL[C,H,I,N,S,T,V,Z] SE[C,H,I,N,S,T,V,Z] EIJMP ICALL
EICALL IJMP NOP RET RETI SLEEP WDR
OPb (B667)
BCLR BSET
OPRdb (B667)
BLD BST SBRC SBRS
Special (B667,B670)
CLR TST LSL LD ST
(cont.)

View File

@ -1,6 +0,0 @@
Flow (B668)
RJMP RCALL
BR[BC,BS,CC,CS,EQ,NE,GE,HC,HS,ID,IE,LO,LT,MI,PL,SH,TC,TS,VC,VS]
Flow macros (B671)
LBL! LBL, SKIP, TO, FLBL, FLBL! BEGIN, AGAIN? AGAIN, IF, THEN,

View File

@ -1,7 +0,0 @@
AVR SPI programmer
This program allows you to access AVR chips Flash memory, EEPROM
and fuses using a SPI relay. This requires drivers that imple-
ment the SPI Relay protocol.
Load range: B691-B693

View File

@ -1,11 +1,9 @@
# Working with AVR microcontrollers
# Assembling AVR binaries
TODO
# Programming AVR chips
(In this documentation, you are expected to have an AVR binary
ready to send. To assemble an AVR binary from source, see
asm.txt)
To program AVR chips, you need a device that provides the SPI
protocol. The device built in the rc2014/sdcard recipe fits the
bill. Make sure you can override the SPI clock because the sys-
@ -18,7 +16,7 @@ to proper AVR pins as described in the MCU's datasheet. Note
that this device will be the same as the one you'll use for any
modern SPI-based AVR programmer, with RESET replacing SS.
The AVR programming code is at B690.
The AVR programming code is at B160.
Before you begin programming the chip, the device must be desel-
ected. Ensure with "0 (spie)".