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Move SIO driver into RC2014 recipe
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1
blk/001
1
blk/001
@ -10,4 +10,3 @@ MASTER INDEX
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620 Sega Master System Recipe
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650 AVR assembler 730 8086 assembler
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800 8086 boot code 830 PC/AT recipe
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850 Zilog SIO driver
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6
blk/580
6
blk/580
@ -3,6 +3,6 @@ RC2014 Recipe
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Support code for the RC2014 recipe. Contains drivers for the
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ACIA, SD card and AT28 EEPROM.
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581 ACIA 590 AT28 EEPROM
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595 SPI relay 600 SD card
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618 Xcomp unit
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581 ACIA 586 Zilog SIO driver
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592 AT28 EEPROM 595 SPI relay
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600 SD card 618 Xcomp unit
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14
blk/584
Normal file
14
blk/584
Normal file
@ -0,0 +1,14 @@
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: (key)
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( inc then fetch )
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[ ACIAR> LITN ] C@ 1+ [ ACIA_BUFSZ 1- LITN ] AND
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( As long as R> == W>-1, it means that buffer is empty )
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BEGIN DUP [ ACIAW> LITN ] C@ = NOT UNTIL
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DUP [ ACIA( LITN ] @ + C@ ( ridx c )
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SWAP [ ACIAR> LITN ] C! ( c )
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;
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: (emit)
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( As long at CTL bit 1 is low, we are transmitting. wait )
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BEGIN [ ACIA_CTL LITN ] PC@ 0x02 AND UNTIL
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( The way is clear, go! )
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[ ACIA_IO LITN ] PC!
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;
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11
blk/585
Normal file
11
blk/585
Normal file
@ -0,0 +1,11 @@
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: ACIA$
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H@ [ ACIA( LITN ] ! 0 [ ACIAR> LITN ] C!
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1 [ ACIAW> LITN ] C! ( write index starts one pos later )
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[ ACIA_BUFSZ LITN ] ALLOT
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( setup ACIA
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CR7 (1) - Receive Interrupt enabled
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CR6:5 (00) - RTS low, transmit interrupt disabled.
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CR4:2 (101) - 8 bits + 1 stop bit
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CR1:0 (10) - Counter divide: 64 )
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0b10010110 [ ACIA_CTL LITN ] PC!
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(im1) ;
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5
blk/586
Normal file
5
blk/586
Normal file
@ -0,0 +1,5 @@
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Zilog SIO driver
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Declarations at B587
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Driver load range at B588-B590
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28
blk/587
28
blk/587
@ -1,14 +1,14 @@
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: (key)
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( inc then fetch )
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[ ACIAR> LITN ] C@ 1+ [ ACIA_BUFSZ 1- LITN ] AND
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( As long as R> == W>-1, it means that buffer is empty )
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BEGIN DUP [ ACIAW> LITN ] C@ = NOT UNTIL
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DUP [ ACIA( LITN ] @ + C@ ( ridx c )
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SWAP [ ACIAR> LITN ] C! ( c )
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;
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: (emit)
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( As long at CTL bit 1 is low, we are transmitting. wait )
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BEGIN [ ACIA_CTL LITN ] PC@ 0x02 AND UNTIL
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( The way is clear, go! )
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[ ACIA_IO LITN ] PC!
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;
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0x80 CONSTANT SIO_ACTL 0x81 CONSTANT SIO_ADATA
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0x82 CONSTANT SIO_BCTL 0x83 CONSTANT SIO_BDATA
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0x20 CONSTANT SIO_BUFSZ ( SZ-1 must be a mask )
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( Address in memory that can be used variables shared
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with SIO native words. 4 bytes used. )
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CREATE SIO_MEM SYSVARS 0x70 + ,
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( Points to SIO buf )
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: SIO( SIO_MEM @ 2+ ;
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( Read buf idx Pre-inc )
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: SIOR> SIO_MEM @ ;
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( Write buf idx Post-inc )
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: SIOW> SIO_MEM @ 1+ ;
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( This means that if W> == R>, buffer is full.
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If R>+1 == W>, buffer is empty. )
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26
blk/588
26
blk/588
@ -1,11 +1,15 @@
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: ACIA$
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H@ [ ACIA( LITN ] ! 0 [ ACIAR> LITN ] C!
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1 [ ACIAW> LITN ] C! ( write index starts one pos later )
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[ ACIA_BUFSZ LITN ] ALLOT
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( setup ACIA
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CR7 (1) - Receive Interrupt enabled
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CR6:5 (00) - RTS low, transmit interrupt disabled.
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CR4:2 (101) - 8 bits + 1 stop bit
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CR1:0 (10) - Counter divide: 64 )
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0b10010110 [ ACIA_CTL LITN ] PC!
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(im1) ;
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( INT handler. Set RST 38 jump ) PC ORG @ 0x39 + !
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AF PUSH, BEGIN,
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SIO_ACTL INAi, ( RR0 ) 0x01 ANDi, ( is recv buf full? )
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IFZ, ( nope, exit ) A 0x20 ( CMD 4 ) LDri, SIO_ACTL OUTiA,
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AF POP, EI, RETI, THEN,
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HL PUSH,
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HL SIOW> LDdi, A (HL) LDrr,
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HL DECd, (HL) CPr, ( W> == R> ? )
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IFNZ, ( buffer not full )
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( get wr ptr ) HL SIO( LDd(i),
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L ADDr, IFC, H INCr, THEN, L A LDrr,
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( fetch/write ) SIO_ADATA INAi, (HL) A LDrr,
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( advance W> ) SIOW> LDA(i), A INCr,
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SIO_BUFSZ 1- ANDi, SIOW> LD(i)A,
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THEN, HL POP, JR, AGAIN,
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18
blk/590
18
blk/590
@ -1,6 +1,12 @@
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AT28 Driver
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Write to an AT28 EEPROM while making sure that proper timing
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is followed and verify data integrity.
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Load with "591 LOAD"
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: _ [ SIO_ACTL LITN ] PC! ;
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: SIO$
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H@ [ SIO( LITN ] ! 0 [ SIOR> LITN ] C!
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1 [ SIOW> LITN ] C! ( write index starts one pos later )
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[ SIO_BUFSZ LITN ] ALLOT
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0x18 _ ( CMD3 )
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0x24 _ ( CMD2/PTR4 ) 0b11000100 _ ( WR4/64x/1stop/nopar )
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0x03 _ ( PTR3 ) 0b11000001 _ ( WR3/RXen/8char )
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0x05 _ ( PTR5 ) 0b11001000 _ ( WR5/TXen/8char )
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0x21 _ ( CMD2/PTR1 ) 0b00011000 _ ( WR1/Rx INT all chars )
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(im1)
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;
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6
blk/592
Normal file
6
blk/592
Normal file
@ -0,0 +1,6 @@
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AT28 Driver
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Write to an AT28 EEPROM while making sure that proper timing
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is followed and verify data integrity.
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Load with "593 LOAD"
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2
blk/618
2
blk/618
@ -5,7 +5,7 @@ RS_ADDR 0x80 - CONSTANT SYSVARS
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212 LOAD ( z80 assembler )
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262 LOAD ( xcomp ) 282 LOAD ( boot.z80.decl )
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270 LOAD ( xcomp overrides ) 283 335 LOADR ( boot.z80 )
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353 LOAD ( xcomp core low ) 583 588 LOADR ( acia )
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353 LOAD ( xcomp core low ) 583 585 LOADR ( acia )
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380 LOAD ( xcomp core high )
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(entry) _
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( Update LATEST )
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5
blk/850
5
blk/850
@ -1,5 +0,0 @@
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Zilog SIO driver
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Declarations at B851
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Driver load range at B852-BXXX.
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14
blk/851
14
blk/851
@ -1,14 +0,0 @@
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0x80 CONSTANT SIO_ACTL 0x81 CONSTANT SIO_ADATA
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0x82 CONSTANT SIO_BCTL 0x83 CONSTANT SIO_BDATA
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0x20 CONSTANT SIO_BUFSZ ( SZ-1 must be a mask )
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( Address in memory that can be used variables shared
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with SIO native words. 4 bytes used. )
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CREATE SIO_MEM SYSVARS 0x70 + ,
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( Points to SIO buf )
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: SIO( SIO_MEM @ 2+ ;
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( Read buf idx Pre-inc )
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: SIOR> SIO_MEM @ ;
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( Write buf idx Post-inc )
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: SIOW> SIO_MEM @ 1+ ;
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( This means that if W> == R>, buffer is full.
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If R>+1 == W>, buffer is empty. )
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15
blk/852
15
blk/852
@ -1,15 +0,0 @@
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( INT handler. Set RST 38 jump ) PC ORG @ 0x39 + !
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AF PUSH, BEGIN,
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SIO_ACTL INAi, ( RR0 ) 0x01 ANDi, ( is recv buf full? )
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IFZ, ( nope, exit ) A 0x20 ( CMD 4 ) LDri, SIO_ACTL OUTiA,
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AF POP, EI, RETI, THEN,
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HL PUSH,
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HL SIOW> LDdi, A (HL) LDrr,
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HL DECd, (HL) CPr, ( W> == R> ? )
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IFNZ, ( buffer not full )
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( get wr ptr ) HL SIO( LDd(i),
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L ADDr, IFC, H INCr, THEN, L A LDrr,
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( fetch/write ) SIO_ADATA INAi, (HL) A LDrr,
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( advance W> ) SIOW> LDA(i), A INCr,
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SIO_BUFSZ 1- ANDi, SIOW> LD(i)A,
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THEN, HL POP, JR, AGAIN,
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12
blk/855
12
blk/855
@ -1,12 +0,0 @@
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: _ [ SIO_ACTL LITN ] PC! ;
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: SIO$
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H@ [ SIO( LITN ] ! 0 [ SIOR> LITN ] C!
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1 [ SIOW> LITN ] C! ( write index starts one pos later )
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[ SIO_BUFSZ LITN ] ALLOT
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0x18 _ ( CMD3 )
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0x24 _ ( CMD2/PTR4 ) 0b11000100 _ ( WR4/64x/1stop/nopar )
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0x03 _ ( PTR3 ) 0b11000001 _ ( WR3/RXen/8char )
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0x05 _ ( PTR5 ) 0b11001000 _ ( WR5/TXen/8char )
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0x21 _ ( CMD2/PTR1 ) 0b00011000 _ ( WR1/Rx INT all chars )
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(im1)
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;
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@ -35,12 +35,12 @@ I don't think you need a schematic. It's really simple.
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### Building the binary
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The binary from the base recipe has almost all it needs to write to EEPROM. The
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only thing it needs is the AT28 driver from B590. You could add it to the
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only thing it needs is the AT28 driver from B592. You could add it to the
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`xcomp` unit and rebuild, but the driver is so tiny, you're probably better off
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loading it at runtime.
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If your system has mass storage, it's as easy as a LOAD. If it doesn't, you
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can use `/tools/exec` to send `blk/591` to the RC2014.
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can use `/tools/exec` to send `blk/593` to the RC2014.
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## Writing contents to the AT28
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